 Unknown W. Brackets
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1042737c21
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irjit: Correct metadata on Vec2 packing ops.
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2023-09-03 21:13:11 -07:00 |
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Unknown W. Brackets
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c44f0e1fca
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arm64jit: Implement most ALU in IR jit.
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2023-09-03 15:30:55 -07:00 |
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Henrik RydgårdandGitHub
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2f300c2023
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Merge pull request #18060 from unknownbrackets/x86-jitbase
x86jit: Bake emuhack mask into jitbase
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2023-09-03 22:53:23 +02:00 |
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Henrik RydgårdandGitHub
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daa0586641
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Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
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2023-09-03 22:33:24 +02:00 |
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Unknown W. Brackets
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9439a43323
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riscv: Correct an overlap case, fix assert.
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2023-09-03 13:29:57 -07:00 |
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Unknown W. Brackets
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0452b8b57a
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riscv: Account for emuhack in JITBASEREG.
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2023-09-03 13:29:05 -07:00 |
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Unknown W. Brackets
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1d152a1486
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x86jit: Bake emuhack mask into jitbase.
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2023-09-03 12:49:36 -07:00 |
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Henrik RydgårdandGitHub
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4694a11b9f
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Merge pull request #18053 from unknownbrackets/x86-jit-debug
x86jit: Handle breakpoints
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2023-09-03 21:45:48 +02:00 |
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Unknown W. Brackets
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60bcc5b083
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x86jit: Handle breakpoints.
Otherwise, we don't actually break until later, which isn't great.
Could be more optimal, "rewinding" regcache state.
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2023-09-03 12:28:11 -07:00 |
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Unknown W. Brackets
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259734bd47
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irjit: Fix likely delay slot breakpoints.
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2023-09-03 12:27:10 -07:00 |
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Unknown W. Brackets
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e1a1f56f4c
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irjit: Cleanup breakpoint ops.
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2023-09-03 12:27:10 -07:00 |
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Unknown W. Brackets
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7607280837
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arm64jit: Implement just the most basic ops.
This improves the slowness a good bit.
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2023-09-03 12:20:16 -07:00 |
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Unknown W. Brackets
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1b756ff8c1
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arm64jit: Add initial base for IR jit.
This works, but very slowly at this point.
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2023-09-03 12:14:28 -07:00 |
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Unknown W. Brackets
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c7304eccdb
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x86jit: Avoid R15 for jitbase if near ctxreg.
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2023-09-02 23:05:56 -07:00 |
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Henrik RydgårdandGitHub
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f6c1493373
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Merge pull request #18048 from unknownbrackets/irjit-vec4
IR: Add a pass to keep things in vec4 more
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2023-09-02 15:11:06 +02:00 |
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Henrik RydgårdandGitHub
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20dedec07e
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Merge pull request #18046 from unknownbrackets/x86-jit-reduce
x86jit: Reduce bloat further
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2023-09-02 13:37:20 +02:00 |
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Unknown W. Brackets
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739e474957
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irjit: Improve dot and store vec4 interaction.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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becad54923
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x86jit: Maintain Vec4 on FMov extract.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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2ca638868c
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irjit: Remove Vec4Scale/Vec4Dot aliasing in pass.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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96c90c19c6
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irjit: Reduce unnecessary shuffles.
If it's never used as a Vec4 again, it's often not worth it.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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5f84887dea
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irjit: Add a pass to keep Vec4s in Vec4s.
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2023-09-01 22:35:59 -07:00 |
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Unknown W. Brackets
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9bac755491
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x86jit: Avoid pointerify if clobbered.
For x86, it's not worth it for one.
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2023-09-01 22:34:22 -07:00 |
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Unknown W. Brackets
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b370a89ef2
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x86jit: Reduce block link padding.
Reduces bloat a good bit.
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2023-09-01 22:33:02 -07:00 |
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Unknown W. Brackets
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c5d0e1d0cc
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x86jit: Implement float to integer.
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2023-09-01 22:31:25 -07:00 |
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Unknown W. Brackets
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c85886c11e
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irjit: Use enum for rounding modes.
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2023-09-01 22:29:24 -07:00 |
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Henrik RydgårdandGitHub
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351de6eb25
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Merge pull request #18026 from unknownbrackets/x86-jit-float
x86jit: Fix vsat0 saturate
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2023-08-31 08:28:50 +02:00 |
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Unknown W. Brackets
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bcac804cc5
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x86jit: Fix vsat0 saturate.
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2023-08-30 23:07:57 -07:00 |
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Unknown W. Brackets
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d5a51da95e
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x86jit: Fix pointer modify when masked.
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2023-08-30 22:04:26 -07:00 |
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Unknown W. Brackets
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742dc0a0c7
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x86jit: Fix vec4 clobber issue.
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2023-08-30 22:04:25 -07:00 |
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Henrik RydgårdandGitHub
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5321cb97fd
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Merge pull request #18007 from unknownbrackets/x86-jit-lsu
x86jit: Implement CondStore
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2023-08-29 09:06:43 +02:00 |
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Unknown W. Brackets
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8233fdfd91
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x86jit: Implement CondStore.
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2023-08-28 23:32:49 -07:00 |
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Unknown W. Brackets
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181adde6f1
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x86jit: Implement float saturates.
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2023-08-28 23:11:46 -07:00 |
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Unknown W. Brackets
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c4d13e522b
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x86jit: Use a literal pool to avoid rip checks.
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2023-08-28 23:11:46 -07:00 |
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Unknown W. Brackets
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eab05e32a7
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x86jit: Implement FCvtScaledSW.
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2023-08-28 23:11:46 -07:00 |
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Unknown W. Brackets
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2b6bd01417
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x86jit: Optimize FMul.
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2023-08-28 23:11:46 -07:00 |
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Henrik RydgårdandGitHub
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ae0af175de
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Merge pull request #18004 from unknownbrackets/x86-jit-minor
x86jit: Small cleanup and tweaks, downcountInRegster, GetFPRLaneCount bugfix
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2023-08-29 08:01:47 +02:00 |
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Unknown W. Brackets
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0cb6a17ea3
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x86jit: Small Clz codesize optimization.
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2023-08-28 21:17:06 -07:00 |
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Unknown W. Brackets
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14d871730f
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x86jit: Optimize slow memory.
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2023-08-28 21:16:38 -07:00 |
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Unknown W. Brackets
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1bfa054a41
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irjit: Correct GetFPRLaneCount().
Oops, this was just wrong...
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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75e20af886
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x86jit: Fix default prefix on core switch.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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8e8605935e
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irjit: Detect subtract-to-zero as constant.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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0a5eafa3de
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x86jit: Another small LEA optimization.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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289cb71790
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x86jit: Small tweaks to fixed code.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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ee5381917a
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x86jit: Implement downcount in register.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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7f3e2e55b5
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x86jit: Small opt for Sltu.
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2023-08-28 21:09:56 -07:00 |
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Unknown W. Brackets
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4e90bd5070
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x86jit: Use NEG more automatically for Sub x,0,y.
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2023-08-28 21:09:56 -07:00 |
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Henrik RydgårdandGitHub
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dddf63d057
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Merge pull request #17993 from unknownbrackets/x86-jit-minor
x86jit: Replacements, expose for profiling better
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2023-08-28 10:23:00 +02:00 |
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Henrik RydgårdandGitHub
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0ecfb6b112
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Merge pull request #17992 from unknownbrackets/x86-jit-float
x86jit: Implement trig instructions, couple other FPU
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2023-08-28 10:20:38 +02:00 |
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Henrik RydgårdandGitHub
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54ebe461fc
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Merge pull request #17994 from unknownbrackets/x86-jit-lea
x86: Use LEA in a few sensible places
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2023-08-28 10:17:13 +02:00 |
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Henrik RydgårdandGitHub
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24e0cb013b
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Merge pull request #17991 from unknownbrackets/x86-jit-dot
x86jit: Improve vdot performance
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2023-08-28 10:15:03 +02:00 |
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