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3004 Commits
Author SHA1 Message Date
Unknown W. Brackets 4380bf9787 arm64jit: Optimize transfers to vec4 better. 2023-09-30 15:44:53 -07:00
Unknown W. Brackets cb835295c8 arm64jit: Implement reg lane transfers. 2023-09-30 15:44:41 -07:00
Henrik RydgårdandGitHub 5d8a0b3ac7 Merge pull request #18266 from unknownbrackets/ir-vtfm 
irjit: Fix vhtfm instruction
 2023-09-29 09:43:06 +02:00
Unknown W. Brackets c92148ee2c irjit: Fix vhtfm instruction. 2023-09-28 21:16:54 -07:00
Henrik Rydgård 84d0236bf4 Comment fixes 2023-09-27 12:31:17 +02:00
Henrik Rydgård 4c0077fd84 Protect against weirdness in UnlinkBlocks (hopefully not needed after prev fix) 2023-09-27 12:31:17 +02:00
Henrik RydgårdandGitHub d6a8bfdf3e Merge pull request #18249 from unknownbrackets/arm64jit-vcrsp 
arm64jit: Avoid fused multiplies in vcrsp.t
 2023-09-27 08:49:01 +02:00
Unknown W. Brackets ded18ff237 arm64jit: Avoid fused multiplies in vcrsp.t. 
With this change, issues in Harvest Moon with teleporting animals seem to
disappear.  It was causing some differences in signs of zeros in results,
and slightly different result values.
 2023-09-26 20:09:02 -07:00
Henrik Rydgård dd2b1ace88 BlockCache on ARM/ARM64: Allow two more exits 2023-09-26 19:44:05 +02:00
Henrik Rydgård 51d5026792 WriteExit: Assert on bad exit numbers 2023-09-26 19:39:48 +02:00
Henrik Rydgård c0ee711cb9 In the FinalizeBlock assert, extract some more info 2023-09-26 13:37:40 +02:00
Henrik RydgårdandGitHub 9fffa33eee Merge pull request #18234 from unknownbrackets/x86-ir-transfer 
x86jit: Perform vector transfers instead of flushing to memory
 2023-09-26 09:28:05 +02:00
Unknown W. Brackets 38e5b33a53 x86jit: Prefer BLENDPS to INSERTPS. 
It's faster, this performs better.
 2023-09-25 22:12:48 -07:00
Henrik RydgårdandGitHub 9f62a3f750 Merge pull request #18235 from unknownbrackets/ir-vdet 
irjit: Handle VDet
 2023-09-25 09:06:20 +02:00
Henrik RydgårdandGitHub 51456980db Merge pull request #18121 from unknownbrackets/jit-ir-profiler 
IR: Add mini native jit MIPS block profiler
 2023-09-25 09:04:55 +02:00
Unknown W. Brackets 9b2fa46861 IR: Add mini native jit MIPS block profiler. 2023-09-24 23:04:29 -07:00
Unknown W. Brackets e104a28b71 irjit: Handle VDet. 2023-09-24 23:03:25 -07:00
Unknown W. Brackets 05786f5719 x86jit: Correct spill on IR lane extract. 2023-09-24 19:06:06 -07:00
Unknown W. Brackets 685d2acffe x86jit: Retain old lanes when there's space. 2023-09-24 17:31:25 -07:00
Unknown W. Brackets 46e704f879 x86jit: Cleanup and refactor transfer. 2023-09-24 16:58:41 -07:00
Unknown W. Brackets d9f6bae1ff x64jit: Initial reg transfer. 2023-09-24 16:28:29 -07:00
Unknown W. Brackets 88b6442527 irjit: Add facility for native reg transfer. 2023-09-24 16:28:29 -07:00
Henrik RydgårdandGitHub 06a1f0b72c Merge pull request #18226 from unknownbrackets/x86-ir-breakpoints 
x86jit: Improve memory breakpoint speed
 2023-09-25 00:47:22 +02:00
Unknown W. Brackets da013ee105 x86jit: Fix asm jitbase displacement check. 2023-09-24 12:11:00 -07:00
Unknown W. Brackets 7d0f2e43b6 irjit: Fix safety of kernel bit memory addresses. 2023-09-24 10:18:55 -07:00
Henrik RydgårdandGitHub 2ba63c65f2 Merge pull request #18227 from unknownbrackets/x86-ir-flush 
x86jit: Flush floats together if possible
 2023-09-24 17:27:38 +02:00
Unknown W. Brackets d36728e532 x86jit: Load common float vals from constants. 2023-09-24 08:01:08 -07:00
Unknown W. Brackets decccf199a x86jit: Flush floats together if possible. 2023-09-24 08:01:05 -07:00
Unknown W. Brackets 9742aaaffe x86jit: Use MOVAPS directly when we can. 
May help older processors or reduce total bytes.
 2023-09-24 08:01:02 -07:00
Unknown W. Brackets 772b3ff7b8 arm64jit: Tweak memchecks. 2023-09-24 07:42:11 -07:00
Unknown W. Brackets e433a8be4a arm64jit: Speed up memchecks, add validation. 2023-09-24 07:42:11 -07:00
Unknown W. Brackets 5929aaae85 x86jit: Speed up safe memory checks. 2023-09-24 07:06:57 -07:00
Unknown W. Brackets 017d0d4b17 x86jit: Improve memory breakpoint speed. 
This helps a lot compared to before.
 2023-09-24 07:06:57 -07:00
Unknown W. Brackets 34ff24a4f3 irjit: Describe native offsets better. 
Also check in case of non-linear blocks, can happen with preload.
 2023-09-24 07:05:30 -07:00
Unknown W. Brackets 3e20a5802f x86jit: Describe constants better. 2023-09-24 06:46:42 -07:00
Henrik RydgårdandGitHub 1c58617392 Merge pull request #18208 from unknownbrackets/x86-ir-float 
x86jit: Speed up float to int conversions
 2023-09-24 09:30:00 +02:00
Henrik RydgårdandGitHub ac3139b8ee Merge pull request #18213 from unknownbrackets/x86-ir-fcmp 
IR: Improve fcmp/vfpu compare jit
 2023-09-24 09:29:14 +02:00
Unknown W. Brackets 6d41f15f0d x86jit: Implement FSign. 2023-09-23 22:08:17 -07:00
Unknown W. Brackets 06ec41d1de x86jit: Implement fcr31/break related ops. 2023-09-23 22:01:22 -07:00
Unknown W. Brackets 3a705d9470 x86jit: Implement BSwap16. 2023-09-23 22:01:09 -07:00
Unknown W. Brackets 580c9a634b x86jit: Implement ReverseBits. 2023-09-23 22:00:58 -07:00
Unknown W. Brackets 24da5a3ba2 irjit: Small simplification to regcache. 2023-09-23 22:00:49 -07:00
Unknown W. Brackets 15f01b13a2 x86jit: Small tweak for SltU zero, x. 2023-09-23 22:00:38 -07:00
Unknown W. Brackets 14e2e1ed62 x64jit: Optimize FCmpVfpuAggregate. 2023-09-23 14:31:46 -07:00
Unknown W. Brackets c5d896a9d7 x86jit: Speed up c.eq.s. 2023-09-23 14:31:18 -07:00
Unknown W. Brackets 1c81d47dd4 x86jit: Speed up float to int conversions. 2023-09-23 13:28:58 -07:00
Unknown W. Brackets 69b8fb9bc2 irjit: Correct alignment checks against SP. 2023-09-23 13:15:06 -07:00
Henrik Rydgård e64d1e94fe add reporting to the invalid replacement op 2023-09-23 11:39:20 +02:00
Henrik Rydgård 8fc01e37d9 Check for bad indices in GetReplacementFunc to avoid crashes 2023-09-23 10:09:55 +02:00
Henrik Rydgård e7c0b41867 Improve an assert 2023-09-22 10:58:43 +02:00