749e3a02cb
Jit: Add missing instruction address check from ARM jits
2026-02-26 10:37:12 +01:00
505a72bb3f
Work around java exception seen in reporting. Buildfix.
2026-02-18 01:34:56 +01:00
8897b5914a
Improve integrity checks in JIT (trying to catch an elusive crash)
2026-02-17 22:42:04 +01:00
1b0e701c87
Expose some more pointers in the ImDebugger UI
2026-02-17 22:40:00 +01:00
f0ba391a4e
Remove the whole concept of proxy blocks from the block cache, and experimental uses of it.
2026-02-17 09:40:27 +01:00
9f5be16663
Jit: Remove the Jal-to-replacement optimization (really not all that benificial)
2026-02-17 09:40:27 +01:00
ca127b0e5b
More fixes, more gamescreen button fixes
2026-02-12 01:35:57 +01:00
2797cfca56
Remove more vestiges of old experiments
2026-02-12 01:23:48 +01:00
44a2585753
Rename some function, remove an unused return value
2026-02-12 01:23:45 +01:00
d5444a7f46
Remove old rudimentary start at a MIPS->MIPS jit
2026-02-11 23:33:41 +01:00
b999c51a1a
Code cleanup. Don't use gpr.SetRegImm where all we do is write to a scratch register
2026-02-10 19:28:53 +01:00
e4f7a39c40
Correct an optimization in the ARM64 jit for min and max instructions
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Fixes the big glitch in #13444
2026-02-10 19:28:53 +01:00
ed5a052258
Remove unused initial work for adding NEON support to ARM JITs.
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Our SIMD strategy for ARM is the JitUsingIR.
2026-01-29 17:41:57 +01:00
ba148e5ec7
JIT/IRJit: Delete an old "function preloading" experiment
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This caused some confusion while trying to debug #20502
2025-06-11 15:45:18 +02:00
962bd8239d
Remove more excessive error reporting.
2025-03-02 02:28:45 +01:00
83af54950f
Move more core-related stuff into Core.cpp/h
2024-12-08 11:54:58 +01:00
96c4a10e8c
Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping.
2024-12-01 21:04:21 +01:00
0e6fc8e0e3
Assorted warning fixes
2024-11-28 15:02:26 +01:00
7992ff4627
Make CBreakpoints an object
2024-11-25 00:22:53 +01:00
d3e9398cb3
Split Core_EnableStepping into Core_Break and Core_Resume
2024-11-03 17:53:42 +01:00
85e7ff7ac3
Target->Native renaming. More intuitive (at least to me)
2024-07-22 01:24:34 +02:00
9d36a08ec4
Some renaming, remove a gross hack
2024-07-21 19:12:51 +02:00
e01ca5b057
Logging API change (refactor) ( #19324 )
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* Rename LogType to Log
* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.
* Mac/ARM64 buildfix
* Do the same with the hle result log macros
* Rename the log names to mixed case while at it.
* iOS buildfix
* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
5526ef012c
Store IR instructions in a large arena vector instead of loosely in each block.
2024-06-07 09:28:27 +02:00
e75e7a0e43
Add an optimizeForInterpreter flag
2024-05-26 13:41:31 +02:00
0e57cf30c7
ARM64: Disable the JIT implementation of the vh2f instruction, not accurate
2024-04-29 11:32:54 +02:00
126d88ecfc
Back out clearly inconsequential/useless .reserve() calls
2023-12-29 08:27:56 +01:00
e5af1f8bd0
Merge pull request #18560 from unknownbrackets/replacement-slice
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HLE: Slice the very slow memset/memcpy variants
2023-12-17 12:35:48 +01:00
053831bf4d
HLE: Add mechanics for sliced replacements.
2023-12-16 09:08:58 -08:00
b871e76d05
[Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible
2023-12-15 13:59:19 +03:00
2a24c99441
arm64jit: Correct FlushBeforeCall pairing.
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Oops, some silly mistakes here.
2023-10-14 20:54:40 -07:00
b85b0476b9
arm64jit: Correct vdot vec4 mapping.
2023-10-14 20:54:40 -07:00
db805cc4cc
Merge pull request #18282 from unknownbrackets/ir-compiling
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Improve IR compilation performance
2023-10-01 11:34:27 +02:00
00c80cea6e
irjit: Optimize offset logging during compile.
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As I guessed, this was expensive. using a vector and reserve isn't very.
It's nice to keep this before logBlocks_ is > 0, in case it's set mid
block.
2023-09-30 15:56:18 -07:00
4380bf9787
arm64jit: Optimize transfers to vec4 better.
2023-09-30 15:44:53 -07:00
cb835295c8
arm64jit: Implement reg lane transfers.
2023-09-30 15:44:41 -07:00
84d0236bf4
Comment fixes
2023-09-27 12:31:17 +02:00
d6a8bfdf3e
Merge pull request #18249 from unknownbrackets/arm64jit-vcrsp
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arm64jit: Avoid fused multiplies in vcrsp.t
2023-09-27 08:49:01 +02:00
ded18ff237
arm64jit: Avoid fused multiplies in vcrsp.t.
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With this change, issues in Harvest Moon with teleporting animals seem to
disappear. It was causing some differences in signs of zeros in results,
and slightly different result values.
2023-09-26 20:09:02 -07:00
51d5026792
WriteExit: Assert on bad exit numbers
2023-09-26 19:39:48 +02:00
9fffa33eee
Merge pull request #18234 from unknownbrackets/x86-ir-transfer
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x86jit: Perform vector transfers instead of flushing to memory
2023-09-26 09:28:05 +02:00
9b2fa46861
IR: Add mini native jit MIPS block profiler.
2023-09-24 23:04:29 -07:00
88b6442527
irjit: Add facility for native reg transfer.
2023-09-24 16:28:29 -07:00
06a1f0b72c
Merge pull request #18226 from unknownbrackets/x86-ir-breakpoints
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x86jit: Improve memory breakpoint speed
2023-09-25 00:47:22 +02:00
7d0f2e43b6
irjit: Fix safety of kernel bit memory addresses.
2023-09-24 10:18:55 -07:00
decccf199a
x86jit: Flush floats together if possible.
2023-09-24 08:01:05 -07:00
772b3ff7b8
arm64jit: Tweak memchecks.
2023-09-24 07:42:11 -07:00
e433a8be4a
arm64jit: Speed up memchecks, add validation.
2023-09-24 07:42:11 -07:00
ac3139b8ee
Merge pull request #18213 from unknownbrackets/x86-ir-fcmp
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IR: Improve fcmp/vfpu compare jit
2023-09-24 09:29:14 +02:00
15f01b13a2
x86jit: Small tweak for SltU zero, x.
2023-09-23 22:00:38 -07:00
Henrik Rydgård