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https://github.com/hrydgard/ppsspp.git
synced 2026-07-11 01:25:07 +02:00
Remove more excessive error reporting.
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@@ -84,7 +84,7 @@ static u32 sceDmacMemcpy(u32 dst, u32 src, u32 size) {
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}
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if (dmacMemcpyDeadline > CoreTiming::GetTicks()) {
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WARN_LOG_REPORT_ONCE(overlapDmacMemcpy, Log::HLE, "sceDmacMemcpy(dest=%08x, src=%08x, size=%d): overlapping read", dst, src, size);
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WARN_LOG(Log::HLE, "sceDmacMemcpy(dest=%08x, src=%08x, size=%d): overlapping read", dst, src, size);
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// TODO: Should block, seems like copy doesn't start until previous finishes.
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// Might matter for overlapping copies.
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}
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+4
-2
@@ -977,11 +977,13 @@ static u32 sceIoChstat(const char *filename, u32 iostatptr, u32 changebits) {
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if (!iostat.IsValid())
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return hleReportError(Log::sceIo, SCE_KERNEL_ERROR_ERRNO_INVALID_ARGUMENT, "bad address");
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ERROR_LOG_REPORT(Log::sceIo, "UNIMPL sceIoChstat(%s, %08x, %08x)", filename, iostatptr, changebits);
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ERROR_LOG(Log::sceIo, "UNIMPL sceIoChstat(%s, %08x, %08x)", filename, iostatptr, changebits);
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if (changebits & SCE_CST_MODE)
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ERROR_LOG_REPORT(Log::sceIo, "sceIoChstat: change mode to %03o requested", iostat->st_mode);
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if (changebits & SCE_CST_ATTR)
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if (changebits & SCE_CST_ATTR) {
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// These are pretty much all of the reported calls: https://report.ppsspp.org/logs/kind/1115
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ERROR_LOG_REPORT(Log::sceIo, "sceIoChstat: change attr to %04x requested", iostat->st_attr);
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}
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if (changebits & SCE_CST_SIZE)
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ERROR_LOG(Log::sceIo, "sceIoChstat: change size requested");
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if (changebits & SCE_CST_CT)
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@@ -510,7 +510,8 @@ u32 sceKernelRegisterSubIntrHandler(u32 intrNumber, u32 subIntrNumber, u32 handl
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return hleLogDebug(Log::sceIntc, error);
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}
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} else if (error == SCE_KERNEL_ERROR_FOUND_HANDLER) {
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return hleReportError(Log::sceIntc, error, "duplicate handler");
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// Pretty common. Used to report here, but not useful.
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return hleLogError(Log::sceIntc, error, "duplicate handler");
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}
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return hleReportError(Log::sceIntc, error);
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}
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@@ -512,7 +512,7 @@ void ArmJit::Comp_Jump(MIPSOpcode op) {
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// Might be a stubbed address or something?
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if (!Memory::IsValidAddress(targetAddr) || (targetAddr & 3) != 0) {
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if (js.nextExit == 0) {
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ERROR_LOG_REPORT(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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ERROR_LOG(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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} else {
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js.compiling = false;
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}
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@@ -527,7 +527,7 @@ void Arm64Jit::Comp_Jump(MIPSOpcode op) {
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// Might be a stubbed address or something?
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if (!Memory::IsValidAddress(targetAddr) || (targetAddr & 3) != 0) {
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if (js.nextExit == 0) {
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ERROR_LOG_REPORT(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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ERROR_LOG(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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} else {
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js.compiling = false;
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}
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@@ -334,10 +334,11 @@ void IRFrontend::Comp_Jump(MIPSOpcode op) {
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// Might be a stubbed address or something?
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if (!Memory::IsValidAddress(targetAddr)) {
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// If preloading, flush - this block will likely be fixed later.
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if (js.preloading)
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if (js.preloading) {
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js.cancel = true;
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else
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ERROR_LOG_REPORT(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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} else {
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ERROR_LOG(Log::JIT, "Jump to invalid address: %08x", targetAddr);
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}
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// TODO: Mark this block dirty or something? May be indication it will be changed by imports.
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// Continue so the block gets completed and crashes properly.
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}
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@@ -913,7 +913,9 @@ void MIPSCompileOp(MIPSOpcode op, MIPSComp::MIPSFrontendInterface *jit) {
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if (info & OUT_EAT_PREFIX)
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jit->EatPrefix();
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} else {
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ERROR_LOG_REPORT(Log::CPU, "MIPSCompileOp: Invalid instruction %08x", op.encoding);
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// Used to _REPORT this, but I'm confident we have all instructions now, any caught here
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// are due to games crashing, due to cheats or bugs.
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ERROR_LOG(Log::CPU, "MIPSCompileOp: Invalid instruction %08x", op.encoding);
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}
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}
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@@ -640,7 +640,7 @@ void Jit::Comp_Jump(MIPSOpcode op) {
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// Might be a stubbed address or something?
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if (!Memory::IsValidAddress(targetAddr) || (targetAddr & 3) != 0) {
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if (js.nextExit == 0) {
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ERROR_LOG_REPORT(Log::JIT, "Jump to invalid address: %08x PC %08x LR %08x", targetAddr, GetCompilerPC(), currentMIPS->r[MIPS_REG_RA]);
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ERROR_LOG(Log::JIT, "Jump to invalid address: %08x PC %08x LR %08x", targetAddr, GetCompilerPC(), currentMIPS->r[MIPS_REG_RA]);
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} else {
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js.compiling = false;
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}
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