Henrik Rydgård 67ddf899ba Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.

2026-08-15 19:14:13 +02:00

..

RiscVAsm.cpp

Add a utility function for all the ABIs to call functions with a pointer arg. Use to call Advance from the JIT with the MIPSContext. Indent some code better.

2026-08-13 08:09:30 +02:00

RiscVCompALU.cpp

riscv: Use a single reg for LO/HI.

2023-08-20 14:49:09 -07:00

RiscVCompBranch.cpp

x86jit: Stub out op categories to files.

2023-08-20 22:28:54 -07:00

RiscVCompFPU.cpp

riscv: Implement Zfa encoding.

2023-12-29 09:42:23 -08:00

RiscVCompLoadStore.cpp

irjit: Fix safety of kernel bit memory addresses.

2023-09-24 10:18:55 -07:00

RiscVCompSystem.cpp

Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.

2026-08-15 19:14:13 +02:00

RiscVCompVec.cpp

riscv: Implement Zfa encoding.

2023-12-29 09:42:23 -08:00

RiscVJit.cpp

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

RiscVJit.h

JIT/IRJit: Delete an old "function preloading" experiment

2025-06-11 15:45:18 +02:00

RiscVRegCache.cpp

Logging API change (refactor) (#19324)

2024-07-14 14:42:59 +02:00

RiscVRegCache.h

irjit: Add facility for native reg transfer.

2023-09-24 16:28:29 -07:00