mirror of
https://github.com/hrydgard/ppsspp.git
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Henrik RydgårdandClaude Opus 5.5
d71599ae85
They used the OPMVV and OPFVV funct3, which makes them vmv.x.s and vfmv.f.s: the scalar register was written instead of the vector. Nothing used them until now. Checked against GNU as. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
137 lines
3.5 KiB
C++
137 lines
3.5 KiB
C++
// Copyright (c) 2022- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include <cstdio>
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#include "Common/CPUDetect.h"
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#include "Common/RiscVEmitter.h"
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#include "UnitTest.h"
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#include "ext/riscv-disas.h"
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bool TestRiscVEmitter() {
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using namespace RiscVGen;
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cpu_info.RiscV_A = true;
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cpu_info.RiscV_C = true;
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cpu_info.RiscV_D = true;
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cpu_info.RiscV_F = true;
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cpu_info.RiscV_M = true;
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u32 code[1024]{};
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RiscVEmitter emitter((u8 *)code, (u8 *)code);
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emitter.SetAutoCompress(false);
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emitter.LUI(X1, 0xFFFFF000);
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emitter.AUIPC(X2, 0x70051000);
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emitter.JAL(X3, code);
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emitter.JALR(X1, X2, -12);
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FixupBranch b1 = emitter.JAL(X4);
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emitter.SetJumpTarget(b1);
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emitter.BEQ(X5, X6, code);
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emitter.LB(X7, X8, 42);
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emitter.SB(X9, X10, 1337);
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emitter.ADDI(X11, X12, 42);
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emitter.SLLI(X13, X14, 3);
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emitter.ADD(X15, X16, X17);
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emitter.FENCE(Fence::RW, Fence::RW);
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static constexpr uint32_t expected[] = {
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0xfffff0b7,
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0x70051117,
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0xff9ff1ef,
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0xff4100e7,
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0x0040026f,
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0xfe6286e3,
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0x02a40383,
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0x52950ca3,
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0x02a60593,
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0x00371693,
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0x011807b3,
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0x0330000f,
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};
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ptrdiff_t len = (u32 *)emitter.GetWritableCodePtr() - code;
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EXPECT_EQ_INT(len, ARRAY_SIZE(expected));
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for (ptrdiff_t i = 0; i < len; ++i) {
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EXPECT_EQ_HEX(code[i], expected[i]);
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}
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// Zcb loads and stores, which split the offset bits differently by size.
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cpu_info.RiscV_Zcb = true;
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u16 *code16 = (u16 *)code;
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emitter.SetCodePointer((u8 *)code, (u8 *)code);
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emitter.C_LBU(X10, X11, 1);
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emitter.C_LBU(X10, X11, 2);
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emitter.C_SB(X10, X11, 1);
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emitter.C_SB(X10, X11, 2);
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emitter.C_LHU(X10, X11, 2);
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emitter.C_SH(X10, X11, 2);
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// From GNU as.
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static constexpr uint16_t expectedZcb[] = {
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0x81c8,
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0x81a8,
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0x89c8,
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0x89a8,
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0x85a8,
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0x8da8,
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};
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len = (u16 *)emitter.GetWritableCodePtr() - code16;
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EXPECT_EQ_INT(len, ARRAY_SIZE(expectedZcb));
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for (ptrdiff_t i = 0; i < len; ++i) {
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EXPECT_EQ_HEX(code16[i], expectedZcb[i]);
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}
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// Moves between a vector's first element and a scalar register.
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cpu_info.RiscV_V = true;
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emitter.SetCodePointer((u8 *)code, (u8 *)code);
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emitter.VMV_S_X(V7, R_ZERO);
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emitter.VMV_S_X(V1, X10);
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emitter.VFMV_S_F(V7, F10);
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emitter.VMV_X_S(X10, V5);
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emitter.VFMV_F_S(F10, V5);
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emitter.VMV_VI(V3, -1);
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// From GNU as.
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static constexpr uint32_t expectedV[] = {
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0x420063d7,
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0x420560d7,
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0x420553d7,
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0x42502557,
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0x42501557,
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0x5e0fb1d7,
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};
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len = (u32 *)emitter.GetWritableCodePtr() - code;
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EXPECT_EQ_INT(len, ARRAY_SIZE(expectedV));
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for (ptrdiff_t i = 0; i < len; ++i) {
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EXPECT_EQ_HEX(code[i], expectedV[i]);
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}
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// FLI has only the canonical NaN.
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cpu_info.RiscV_Zfa = true;
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EXPECT_TRUE(emitter.CanFLI(32, (uint32_t)0x7FC00000));
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EXPECT_FALSE(emitter.CanFLI(32, (uint32_t)0xFFC00000));
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EXPECT_FALSE(emitter.CanFLI(32, (uint32_t)0x7F800001));
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EXPECT_TRUE(emitter.CanFLI(32, 1.0f));
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return true;
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}
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