LunaMoo
c0d5b4be7e
Merge branch 'vfpu' into TemporaryHackishBranch
2019-03-31 10:58:22 +02:00
LunaMoo
993ed897d3
Merge branch 'master' into TemporaryHackishBranch
2019-03-31 10:58:03 +02:00
LunaMoo
2652fedef0
Add more adhoc hackery.
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But without the kernel thread hackery as it breaks stuff.
2019-03-31 10:48:06 +02:00
Unknown W. Brackets
f8188c4155
Jit: Ignore high bit in vmfvc/vmtvc.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
914e7e5b1f
interp: Ignore high bit in vmfvc/vmtvc.
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Both 0 and 128 read/write the S prefix, for example.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
1ac2625873
interp: Mask moves to vfpu ctrl.
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These bits of the registers can't be written.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
fa5315de5e
interp: Correct size handling for vi2x ops.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
8a888bad96
interp: Handle abs/neg on nan values better.
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`fabsf` was altering other bits.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
d5a0531086
interp: Correct swizzle on vx2i ops.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
3842c4f6b5
interp: Cleanup vsocp size handling.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
d35ea0e81a
interp: Don't write lane 2 on single colorconv.
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Not that it's valid to use the op with that size anyway.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
f1a6539c62
interp: Handle invalid swizzle for vmin/vmax.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
8a92383ea7
interp: Handle invalid swizzle in vsge/vslt.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
e97beac90a
interp: Force vscmp result of invalid to zero.
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Some other ops do this, but mostly only that do plus or minus.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
581dd59a4d
interp: Handle NAN more correctly in vscmp.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
e971c4ded5
interp: Correct vfim for -inf and similar.
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Was dropping the sign bit before for inf and nan.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
26d78c7cd1
interp: Cleanup prefix/size in vcrsp/vqmul.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
cfcb682dba
interp: Correct Vwbn and Vlgb size behavior.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
2ab31d635d
interp: Correct prefixes for vsbn/vsbz.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
150866e123
interp: Handle flush prefixes slightly better.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
6d20c4517b
interp: Handle wrong sizes of vf2h/vh2f.
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Probably not ever used, but they have consistent behavior.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
f9d1432a36
interp: Mask value in vpfxd.
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The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
26307b5c67
interp: Correct vmfvc register behavior.
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The target and source registers were completely wrong.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
3bbdc3c7b6
interp: Handle vtfm/vhtfm prefixes properly.
2019-03-30 12:27:56 -07:00
Unknown W. Brackets
05aaa02171
interp: Handle prefixes for Vmmov/Vmmul/Vmscl.
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I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
2019-03-30 12:27:54 -07:00
Unknown W. Brackets
ad7e322c7e
interp: Correct Vsgn out of swizzle bounds.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
d708e2ebd9
interp: Handle prefixes on matrix init ops.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
5523dcba77
interp: Correct behavior for matrixes with size=1.
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Games don't (shouldn't?) actually use 1x1 matrices, but they seem to have
predictable behavior in matrix ops.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
91891a2069
interp: Handle Vrot prefixes mostly correctly.
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Still some issues with 1/2 results and negate on swizzle.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
a1fe60e28e
IR: Use interp for unhandled prefixes.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
94465a29e9
interp: Correct prefixes on vdot/vhdp.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
78e50cb7a4
interp: Properly apply mask on single lane ops.
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When using something like vadd.s, we should still be applying the mask.
Mainly should only matter if masks are set in a conditional, or if games
nop out instructions.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
591064342e
interp: Correct vrnd prefix handling.
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We don't match random values perfectly anyway, but at least we should vary
at the right times.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
3828a46d53
interp: Correct prefixes on vfad and vavg.
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Including write mask, which didn't work before.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
e0dc8eb126
interp: Confirm vi2f/vf2i prefix handling.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
ba55b6fe3c
interp: Correct prefixes in vsrt ops.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
5ab00685dd
interp: Handle vsgn prefixing.
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One could compare against 3 using this, it just generates zeros to compare
with.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
08830fd0a2
interp: Better prefixes for vdiv/similar ops.
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Turns out it does work, just uses the wrong slot like S/T after all.
These other ops must go through the a similar process.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
a38e914960
interp: Correct simple vmov variant prefixing.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
335dd394b0
interp: Generate constants using prefixes.
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This way they properly respect negate in the S prefix.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
16bc3c0086
interp: Implement vcrs prefixes and sizes.
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It only makes sense as triple, but it can be used as quad/single/etc. and
has consistent and sane results.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
ceeaf3b7ef
interp: Correct vdet prefix handling.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
eaa112789e
interp: Apply T prefix to D in vcmov.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
c270bd2d85
interp: Match actual vdiv prefix handling.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
921ecb4dec
interp: Correct Vscl prefix handling.
2019-03-30 12:26:09 -07:00
Unknown W. Brackets
5ae9931d88
interp: Fix vbfy prefix handling.
2019-03-30 12:26:09 -07:00
LunaMoo
5f119f3bb8
Add option to Enable Dinput along Xinput
2019-03-30 10:37:16 +01:00
LunaMoo
d346d3a8c2
Remove leftovers from removed option.
2019-03-30 08:54:28 +01:00
Unknown W. Brackets
62928e13d8
Merge pull request #11942 from jeeeyul/master
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Fixes iOS exit freezing, Selective PTRACE syscall
2019-03-27 19:14:34 -07:00
Jeeeyul Lee
53e254d352
Disables iOS exit animation to prevent freezing.
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Selective PTRACE sys call.
2019-03-27 11:01:20 +09:00
LunaMoo