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4849ef020e233b4c370a878bc97df1a4cd6f792f
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78 Commits
Author SHA1 Message Date
Henrik RydgårdandClaude Opus 5.5 4849ef020e Decode the unused bits of shifts and Allegrex bit ops as the PSP does 
srl/srlv rotate when the low bit of their unused field (rs or sa) is
set and shift when it's clear, whatever the other bits hold
(cpu/cpu_alu/shift_encodings). The interpreter treated values above 1 as
invalid and the other cores shifted.

The Allegrex bit ops decode only some bits of sa, so all 32 values are
one of wsbh, wsbw, seb, seh and bitrev (cpu/cpu_alu/allegrex_encodings).
AllegrexBitOp() gives the canonical one for every core. Special3
function 0x18 does nothing on the PSP, where it was decoded as an alias
of 0x20.

The interpreter dispatch is regenerated, and its generator now lists
each instruction name once. CPUEquivalence no longer skips the srl/srlv
encodings.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
 2026-10-14 10:56:48 +02:00
Henrik RydgårdandClaude Fable 5.1 e0f09c55d5 MIPS: INT_MIN / -1 leaves HI at zero, like the hardware 
Every path special-cased the one signed division overflow and set the
remainder to -1. cpu/cpu_alu/cpu_div, recorded on a PSP, says it's 0.
The classic arm64 JIT was the only one that got it right, by not
special-casing it at all.

arm64, RISC-V and LoongArch all produce INT_MIN with remainder 0 natively,
so their fixup blocks go away. x86 has to keep the check (IDIV traps) but
sets HI to 0 now, and so do both interpreters.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
 2026-09-22 11:02:20 -06:00
Unknown W. Brackets b9de1a44df jit: Reduce some include pollution. 
Usually no need for all of MIPSAnalyst.
 2022-10-27 23:26:44 -07:00
Unknown W. Brackets 16dca4f69b x86jit: Use BMI2 for variable shifts. 
We don't actually regalloc ECX, but this still saves a copy, and on modern
CPUs these seem to be pretty fast.
 2022-01-31 19:38:17 -08:00
Unknown W. Brackets 2479d52202 Global: Reduce includes of common headers. 
In many places, string, map, or Common.h were included but not needed.
 2022-01-30 16:35:33 -08:00
Unknown W. Brackets 4178f09e57 Build: More consistently avoid _M_ defines. 
We use PPSSPP_ARCH in several places already, this makes it more complete.
 2021-03-02 21:49:21 -08:00
Unknown W. Brackets 5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
Unknown W. Brackets 1b00da2f3a Common: Sign extend w/func not chained casts. 
Should be clearer to read and easier to get right.
 2021-01-31 01:25:52 -08:00
Henrik Rydgård 4d3ec20082 ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h. 2020-09-30 00:09:13 +02:00
Henrik Rydgård 40ec0d8358 Finish getting rid of basictypes.h 2020-09-29 15:51:51 +02:00
Henrik Rydgård 3162f30158 Merge base/basictypes.h into Common/Common.h (mostly). 2020-09-29 15:51:51 +02:00
Unknown W. Brackets 419c1fbd73 Jit: Respect flags for jit types and features. 
Left some free space for more.
 2019-02-03 14:57:08 -08:00
Florent Castelli 8c3552de74 cmake: Detect features at compile time 
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
 2016-10-19 12:31:19 +02:00
Unknown W. Brackets 5105e1947f x86jit: Set HI/LO properly on divide by zero. 2016-05-19 00:06:53 -07:00
Unknown W. Brackets a05ae2a0a6 Correct divide by zero HI/LO values a bit. 
Interpreter is now correct, but it's probably not all that important to
get right in jit.
 2016-05-14 19:23:50 -07:00
Unknown W. Brackets 66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Henrik Rydgård 81dec36da8 Use an accessor to read the compilerPC. 
In the IR it will be read from the block.
 2015-04-11 01:14:37 -07:00
Unknown W. Brackets 7ce5841f30 jit: Avoid mfhi/mflo to $0. 2015-04-07 18:25:28 -07:00
Unknown W. Brackets cdddd4b59c Fix an undefined bit shift. 
Shouldn't have mattered anyway, but maybe this can crash some ARM chip or
something...
 2015-01-19 08:40:10 -08:00
Henrik Rydgard 05a8e2e35d Some work towards being able to build two JITs together 
This will be useful for testing/debugging, but not there yet.
 2014-12-13 21:13:54 +01:00
Henrik Rydgard 51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard 28ca8d4818 x86 jit: Use LEA to emulate addu but only when it can save a few bytes 2014-11-16 17:39:47 +01:00
Henrik Rydgard 1c78e29c79 x86 jit: For clarity, use TEMPREG where it doesn't matter that it's EAX. 
Might have missed a few places.
 2014-11-16 17:38:26 +01:00
Unknown W. Brackets 86e3739a3e x86jit: Optimize some cases of ins/ext. 
They happen but are minor.
 2014-11-09 09:22:29 -08:00
Unknown W. Brackets e05263af32 x86jit: Allow EBX sign extension for 32-bit. 2014-11-09 09:07:52 -08:00
Unknown W. Brackets 8dbd3c3b9c x86jit: Don't lie about ZERO when it's not an imm. 2014-11-09 08:27:02 -08:00
Unknown W. Brackets d0a2ced2f9 x86jit: Flip cc in stl* to avoid reg loads. 
Unfortunately, this zero thing is now concerning me...
 2014-11-09 08:15:39 -08:00
Unknown W. Brackets 59f491eddb x86jit: Micro optimize slt* a bit. 
This improves their performance and hopefully latency.  It also avoids
filling registers that are not likely to be used again.

Fixed a small mistake.
 2014-11-09 07:23:44 -08:00
Henrik Rydgard 5888b3bdc4 Revert "x86jit: Micro optimize slt* a bit." 
This reverts commit ee66596b8d.

Broke a lot of games, probably some small bug.

Conflicts:
	Core/MIPS/x86/CompALU.cpp
 2014-11-09 12:07:21 +01:00
Unknown W. Brackets 313d9e95c7 Clarify a comment. 2014-11-09 01:05:03 -08:00
Unknown W. Brackets ee66596b8d x86jit: Micro optimize slt* a bit. 
This improves their performance and hopefully latency.  It also avoids
filling registers that are not likely to be used again.
 2014-11-08 22:54:03 -08:00
Henrik Rydgård f99c2cd010 x86 Jit: Generate nicer code for some cases of addiu 2014-10-12 17:47:53 +02:00
Unknown W. Brackets 4a1514730f x86jit/ppcjit: Correct some bad sltiu compares. 2014-09-02 08:04:22 -07:00
Henrik Rydgard 82421f4dcf x86 jit: Further fix for nor, thanks unknown 
See #6638
 2014-07-27 22:26:35 +02:00
Henrik Rydgard 903ddbc513 x86 JIT: Fix bug where NOR would not get computed correctly in corner case 
(CompTriArith can end up not actually mapping rd to a register when taking
a shortcut)

May fix the JIT issue mentioned by CPkmn and located by daniel229 as an aside in #6638
 2014-07-27 21:41:41 +02:00
Unknown W. Brackets 27870aa593 x86jit: Map HI/LO as registers. 
Not actually ever cached, but now it's all consistent.
 2014-06-28 00:38:56 -07:00
Henrik Rydgård aea272a3ce Jit x86: optimize "subu r, 0, r" to NEG r. 2014-03-03 13:42:32 +01:00
Unknown W. Brackets 2347498667 x86jit: Use templates to avoid some void * casts. 
Makes it a bit cleaner and potentially safer.
 2014-01-18 09:57:13 -08:00
Unknown W. Brackets dffa35ef2f When ins is used with a zero argument, don't OR. 
Seems it's used effectively to mask out bits with rs=zero.  Makes sense...
 2013-11-29 09:17:12 -08:00
Unknown W. Brackets fd38b10ab6 x86jit: Rename imm funcs to match armjit. 2013-11-10 21:59:49 -08:00
Unknown W. Brackets 3a8f0598c4 x86jit: Implement wsbh/wsbw. 2013-11-10 14:38:09 -08:00
Henrik Rydgard 5ad04a23f4 x86 jit: Rename BindToRegister to MapReg 2013-11-09 15:23:31 +01:00
Unknown W. Brackets 02dd250354 armjit: Optimize out a few immediate logic cases. 2013-11-08 11:39:24 -08:00
Unknown W. Brackets 97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets 109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Unknown W. Brackets 3278b5e373 Handle the immediate case of clz/clo. 2013-07-04 23:07:42 -07:00
Unknown W. Brackets 654490566f Implement clz/clo in x86 jit. 2013-07-04 18:01:17 -07:00
Sacha a26b48fc0b Stub wsbh/wsbw for x86. 2013-06-05 14:55:01 +10:00
Unknown W. Brackets 028e85dc92 Cleanup some differences between the two jits. 2013-03-07 02:08:44 -08:00
Unknown W. Brackets 313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00