Henrik Rydgård
8461ea19b1
Centralize handling of memory exceptions a bit
2020-07-12 15:25:20 +02:00
Unknown W. Brackets
5afc020fbd
x86jit: Force INF * 0 to +NAN.
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See #12519 - this is needed for some graphics to render properly. Seems
to already happen on ARM, so no change to armjit.
2020-04-06 06:33:39 -07:00
Henrik Rydgård
30831f3ea1
Implement and test clz32, use it in the MIPS interpreter cores.
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This will be useful for our vfpu-dot implementations later.
2019-06-14 18:39:15 +02:00
Henrik Rydgård
2f26297062
Clean up some more ifdefs
2019-05-10 23:25:57 +02:00
driver1998
5072584781
Fix neon headers for MSVC ARM64
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MSVC uses arm64_neon.h for ARM64, arm_neon.h is ARM32 only.
2019-05-04 22:45:15 +08:00
Henrik Rydgård
b4721fbc44
Temporary workaround for another IR interpreter crash. See #10897
2018-04-11 11:55:12 +02:00
Unknown W. Brackets
6dda053365
irjit: Add dedicated ops for lwl/swl and friends.
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Temporarily removes optimizations.
2018-01-07 21:05:57 -08:00
Henrik Rydgård
331a8f91e8
Fix that weird unordered compare mode, hopefully
2018-01-04 20:06:26 +01:00
Henrik Rydgård
18be23eccc
IR: More fixes. Still something wrong with VFPU compares (not caused by this PR).
2018-01-04 19:38:36 +01:00
Henrik Rydgård
ca9050b84c
On Linux, can't even include nmmintrin without explicitly enabling SSE 4.2 support.
2018-01-04 18:27:19 +01:00
Henrik Rydgård
fe88d12055
IR interpreter: Add some braces to allow variable declaration in the switch cases.
2018-01-04 18:27:19 +01:00
Henrik Rydgård
e0cc126d09
Add some more SIMD support to IR interpreter. Mostly just because, but also serves as implementation reference for later code generation backends.
2018-01-04 18:27:19 +01:00
Henrik Rydgård
a128624f98
IRInterpreter: Fix bugs in floating point truncation functions
2018-01-04 18:25:54 +01:00
Henrik Rydgård
604b3c3e97
IR Interpreter: Add missing break; to switch case IROp::FSign.
2018-01-04 11:08:56 +01:00
Unknown W. Brackets
bc541bd020
irjit: Encode downcount directly as a constant.
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Simpler this way, now.
2018-01-03 23:32:31 -08:00
Unknown W. Brackets
cffb2d61a7
irjit: Embed constant inside IRInst.
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This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
2018-01-03 23:24:04 -08:00
Henrik Rydgård
3ac2350ad6
IR Interpreter: Add a comment, minor cleanup, minor SSE stuff.
2018-01-03 16:31:55 +01:00
Unknown W. Brackets
8c2edd432b
irjit: Allow continuing from mips break.
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Some games currently generate break instructions, and can be played
otherwise. Should be fixed, but let's not hard crash.
2017-12-25 10:21:22 -08:00
Henrik Rydgard
b0bd7e3c6f
Minor changes for compatibility with VS2017
2017-03-12 17:33:00 +01:00
Henrik Rydgård and GitHub
ea6b72d4c9
Merge pull request #8888 from unknownbrackets/warnings
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Warning fixes
2016-08-06 10:59:06 +02:00
Unknown W. Brackets
fd546ff21d
Fix some type comparison warnings.
2016-08-05 10:47:45 -07:00
Unknown W. Brackets
9972e5b10a
Debugger: Allow logging on CPU breakpoints.
2016-08-04 12:39:29 -07:00
Unknown W. Brackets
4578c3cb54
jit-ir: Implement memory breakpoints.
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These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
2016-07-02 16:38:30 -07:00
Unknown W. Brackets
6fb34d0bee
jit-ir: Add initial breakpoint support.
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No memory breakpoints yet, and cache isn't cleared yet so these don't work
exactly the way you might expect...
2016-07-01 17:15:57 -07:00
Henrik Rydgard
f544364c4a
Fix bug in vus2i (thanks unknown), recognize vectors in IR disasm
2016-05-15 23:35:33 +02:00
Unknown W. Brackets
3f0fc2d851
jit-ir: Fix FSat0_1 behavior on -0.0f.
2016-05-15 13:10:49 -07:00
Henrik Rydgard
d6c2b6e9ae
Most of vi2x
2016-05-15 11:46:01 +02:00
Henrik Rydgard
905af75925
vx2i, vbfy, vsgn
2016-05-15 10:57:43 +02:00
Unknown W. Brackets
c606f64f71
jit-ir: Add div/divu instructions.
2016-05-14 19:23:52 -07:00
Unknown W. Brackets
6413b44434
jit-ir: Enable IR for madd(u)/msub(u).
2016-05-14 19:23:51 -07:00
Unknown W. Brackets
4ac773e8b4
jit-ir: Implement bit reverse instruction.
2016-05-14 18:21:42 -07:00
Unknown W. Brackets
1f28d802a3
FreeBSD buildfix.
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We need Common to have the right _M_SSE define. Also, let's not define
SSE4 until we need it, since we might need ifs.
2016-05-14 09:06:56 -07:00
Henrik Rydgard
64eda6a4ec
IR: Split Syscall into Syscall and ExitToPC, so we can put ApplyRoundingMode in between.
2016-05-14 14:32:22 +02:00
Henrik Rydgard
5923013d65
Simple workaround for timing issue with coreState after syscall.
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Also fixes off by one in ForceCheck.
2016-05-13 20:21:19 +02:00
Henrik Rydgard
5b2504120d
Optimize some common prefixes
2016-05-13 20:15:20 +02:00
Henrik Rydgard
f636b2a315
Minor build and other fixes
2016-05-13 19:31:27 +02:00
Unknown W. Brackets
7b43e0e59d
jit-ir: Add nan/inf compares.
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Without this, Gods Eater Burst crashes before going in game.
2016-05-12 22:53:21 -07:00
Unknown W. Brackets
1ddb2fbfb9
jit-ir: Fix non-SSE Vec4Scale.
2016-05-12 21:02:56 -07:00
Unknown W. Brackets
29ed8d2201
jit-ir: ExitToReg doesn't write to registers.
2016-05-12 18:34:27 -07:00
Henrik Rydgard
7268abec61
IR: vcmp, vcmov, vhdp
2016-05-12 22:35:31 +02:00
Henrik Rydgard
850d0abc91
IR: More VFPU. Support normal fp compares.
2016-05-12 20:16:15 +02:00
Henrik Rydgard
2cbfb192c4
IR: Lots more VFPU support, some with SIMD
2016-05-12 12:17:25 +02:00
Henrik Rydgard
219548b8e2
Prefix prep
2016-05-11 00:16:07 +02:00
Henrik Rydgard
b3dd36982f
Prefix prep
2016-05-10 23:14:26 +02:00
Henrik Rydgard
db1d1ff9fd
IR: Merge the FPU and VFPU instruction sets, no reason to keep them apart
2016-05-10 22:55:27 +02:00
Henrik Rydgard
45efcda6b1
IR: Some more VFPU
2016-05-10 21:50:08 +02:00
Henrik Rydgard
558bb197c7
More VFPU
2016-05-09 23:47:56 +02:00
Henrik Rydgard
a5d5c5ce2b
Do the voffset remapping before the IR. This will let us easily add some virtual VFPU registers for the IR to the end, plus it's slightly faster.
2016-05-09 22:40:59 +02:00
Unknown W. Brackets
ccb8f8d77e
jit-ir: Fix replacement hooks.
2016-05-09 00:36:38 -07:00
Unknown W. Brackets
7ce923d01f
jit-ir: Fix SetConstV.
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Oops.
2016-05-08 22:11:53 -07:00
Henrik Rydgård