Henrik Rydgård
34f79904fd
IR: This optimization is safe when all three regs are consecutive, so avoid disabling it unnecessarily.
2018-01-10 09:19:27 +01:00
Henrik Rydgård
18be23eccc
IR: More fixes. Still something wrong with VFPU compares (not caused by this PR).
2018-01-04 19:38:36 +01:00
Henrik Rydgård
1a97f62dc9
Fix running the CPU test from the UI.
2018-01-04 18:10:41 +01:00
Unknown W. Brackets
905d2c2da6
irjit: Cleanup some invalid op handling.
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And log blocks the same way as other backends.
2018-01-01 08:38:11 -08:00
Henrik Rydgård
22e65ba80d
Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11
2017-08-31 01:14:51 +02:00
Unknown W. Brackets
b483444fab
IR: Cleanup some invalid ops.
2017-04-20 21:11:40 -07:00
Henrik Rydgård and GitHub
1091fd2dc0
Merge pull request #8840 from unknownbrackets/ir-vfpu
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Minor IR cleanup in the VFPU
2016-07-04 10:02:52 +02:00
Unknown W. Brackets
4578c3cb54
jit-ir: Implement memory breakpoints.
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These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
2016-07-02 16:38:30 -07:00
Unknown W. Brackets
8fab3dc91b
jit-ir: Allow 3x3 and 2x2 vmmov in IR.
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While this will generate a lot of FMovs, it should still be better than
bailing to interp.
2016-07-01 14:08:32 -07:00
Unknown W. Brackets
65394f1dba
jit-ir: Fix vbfy with overlap.
2016-07-01 14:08:31 -07:00
Unknown W. Brackets
4761c0aa3f
jit-ir: Allow SIMD on vabs/vneg.
2016-07-01 14:08:31 -07:00
Unknown W. Brackets
a9cdf7651e
jit-ir: Mark prefixes unknown in mtv.
2016-05-17 21:22:57 -07:00
Unknown W. Brackets
b1c7f3dd3f
jit-ir: Correct vx2i with partial overlap.
2016-05-17 21:22:23 -07:00
Henrik Rydgard
f544364c4a
Fix bug in vus2i (thanks unknown), recognize vectors in IR disasm
2016-05-15 23:35:33 +02:00
Unknown W. Brackets
e960158490
jit-ir: Add notes and report about vrot prefixes.
2016-05-15 14:08:59 -07:00
Unknown W. Brackets
ab1461faca
Add prefix handling to vfpu color conv per tests.
2016-05-15 13:16:03 -07:00
Henrik Rydgard
d6c2b6e9ae
Most of vi2x
2016-05-15 11:46:01 +02:00
Henrik Rydgard
905af75925
vx2i, vbfy, vsgn
2016-05-15 10:57:43 +02:00
Henrik Rydgard
7046f960e5
IR: Add vrot
2016-05-15 10:36:18 +02:00
Unknown W. Brackets
e140d36818
ir-jit: Oops, fix matrix scale + tranpose.
2016-05-15 00:59:17 -07:00
Unknown W. Brackets
8a3dce3b8b
jit-ir: Comment most of the vfpu ops.
2016-05-14 17:35:04 -07:00
Unknown W. Brackets
e1dbcd724e
jit-ir: Oops, correct vtfm for transposed case.
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The ones that are aligned are here in this case. Fixes crash in Crisis
Core.
2016-05-14 16:20:39 -07:00
Unknown W. Brackets
01d63a1a9d
jit-ir: Implement vmscl.
2016-05-14 16:20:21 -07:00
Unknown W. Brackets
2e097b8996
Oops, typos.
2016-05-14 14:28:05 -07:00
Unknown W. Brackets
d5d77b41f9
jit-ir: Properly flip vtfm simd cases.
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Disable the broken one and add clearer comments.
2016-05-14 14:23:18 -07:00
Unknown W. Brackets
7c9f368d63
jit-ir: Add some descriptions of mnemonics.
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Sometimes I forget what vhdp etc. meant, let's make the VFPU code a bit
more accessible.
2016-05-14 14:21:53 -07:00
Henrik Rydgard
7a7c3b9b9f
More VFPU, vmmul thoughts
2016-05-14 14:00:01 +02:00
Henrik Rydgard
b7091a8f5d
Simplifications and fixes
2016-05-13 21:02:23 +02:00
Henrik Rydgard
5b2504120d
Optimize some common prefixes
2016-05-13 20:15:20 +02:00
Henrik Rydgard
91a6cf5e44
Add a couple more passes (2-op, optimize f<->v fp moves)
2016-05-13 20:14:03 +02:00
Henrik Rydgard
f636b2a315
Minor build and other fixes
2016-05-13 19:31:27 +02:00
Unknown W. Brackets
9e3572dc63
jit-ir: Improve vidt to handle more cases.
2016-05-12 22:40:26 -07:00
Unknown W. Brackets
f52120353b
jit-ir: Apply prefixes for vector init ops.
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Without this, Gods Eater Burst is horribly broken.
2016-05-12 22:29:31 -07:00
Unknown W. Brackets
c11c0465de
jir-ir: Correct vftm SIMD regs.
2016-05-12 21:29:58 -07:00
Unknown W. Brackets
57b3dbff7e
jit-ir: Avoid flushing on a few Vec4 ops.
2016-05-12 21:01:46 -07:00
Unknown W. Brackets
a8126ca132
jit-ir: Add some missing CONDITIONAL_DISABLEs.
2016-05-12 20:56:47 -07:00
Henrik Rydgard
7268abec61
IR: vcmp, vcmov, vhdp
2016-05-12 22:35:31 +02:00
Henrik Rydgard
1851458628
Bugfixes
2016-05-12 20:28:59 +02:00
Henrik Rydgard
c69a8c07dc
Forgot this
2016-05-12 20:20:59 +02:00
Henrik Rydgard
850d0abc91
IR: More VFPU. Support normal fp compares.
2016-05-12 20:16:15 +02:00
Henrik Rydgard
182674cddf
IR: SIMD another matrix orientation. Fix various issues.
2016-05-12 13:10:26 +02:00
Henrik Rydgard
2cbfb192c4
IR: Lots more VFPU support, some with SIMD
2016-05-12 12:17:25 +02:00
Henrik Rydgard
219548b8e2
Prefix prep
2016-05-11 00:16:07 +02:00
Henrik Rydgard
b3dd36982f
Prefix prep
2016-05-10 23:14:26 +02:00
Henrik Rydgard
db1d1ff9fd
IR: Merge the FPU and VFPU instruction sets, no reason to keep them apart
2016-05-10 22:55:27 +02:00
Henrik Rydgard
45efcda6b1
IR: Some more VFPU
2016-05-10 21:50:08 +02:00
Henrik Rydgard
558bb197c7
More VFPU
2016-05-09 23:47:56 +02:00
Henrik Rydgard
a5d5c5ce2b
Do the voffset remapping before the IR. This will let us easily add some virtual VFPU registers for the IR to the end, plus it's slightly faster.
2016-05-09 22:40:59 +02:00
Henrik Rydgard
e806c369b2
Separate the IR frontend from the IR "Jit"
2016-05-09 19:57:18 +02:00
Henrik Rydgard
3eb5480ade
Initial VFPU
2016-05-08 13:32:22 +02:00
Henrik Rydgård