Unknown W. Brackets
01aebe54b9
interp: Correct vdet prefix handling.
2019-03-31 15:01:11 -07:00
Unknown W. Brackets
cc58d0d3a3
interp: Correct prefixes in vsrt ops.
2019-03-31 15:00:12 -07:00
Unknown W. Brackets
5736b1be2a
interp: Correct some negative invalid zero cases.
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In these cases, the input value wires to +0. Also, transposed the values
in a comment (oops.)
2019-03-31 13:45:37 -07:00
Unknown W. Brackets
aa998b815c
interp: Force vscmp result of invalid to zero.
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Some other ops do this, but mostly only that do plus or minus.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
c7e83cd4fa
interp: Correct vfim for -inf and similar.
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Was dropping the sign bit before for inf and nan.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
5749ae09d0
interp: Correct vmfvc register behavior.
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The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
b2e024025f
interp: Handle wrong sizes of vf2h/vh2f.
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Probably not ever used, but they have consistent behavior.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
aceb0a8244
interp: Correct vrnd prefix handling.
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We don't match random values perfectly anyway, but at least we should vary
at the right times.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets
dfc2449f35
interp: Match actual vdiv prefix handling.
2019-03-31 13:41:48 -07:00
Henrik Rydgård and GitHub
8220a348b2
Merge pull request #11951 from unknownbrackets/vfpu-chunk3
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Improve vrot/vflush/matrix op prefixes improve vscmp and vmtfvc
2019-03-31 22:26:22 +02:00
Henrik Rydgård and GitHub
00ed829173
Merge pull request #11950 from unknownbrackets/vfpu-chunk2
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Correct prefixes for vbfy, vscl, vzero, vone, vidt
2019-03-31 20:46:55 +02:00
Unknown W. Brackets
af3ed69144
interp: Mask moves to vfpu ctrl.
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These bits of the registers can't be written.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets
2a5d4e577d
interp: Handle NAN more correctly in vscmp.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets
db28c61272
interp: Handle flush prefixes slightly better.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets
d40ac043d4
interp: Handle prefixes for Vmmov/Vmmul/Vmscl.
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I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets
26b1368f7b
interp: Handle vrot prefixes mostly correctly.
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Still some issues with 1/2 results and negate on swizzle.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets
8fd8dce185
interp: Use a helper to generate prefix consts.
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This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
2019-03-31 10:33:26 -07:00
Unknown W. Brackets
b86a6af364
interp: Properly apply mask on single lane ops.
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When using something like vadd.s, we should still be applying the mask.
Mainly should only matter if masks are set in a conditional, or if games
nop out instructions.
2019-03-31 10:13:28 -07:00
Unknown W. Brackets
1936e8c4d1
interp: Generate constants using prefixes.
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This way they properly respect negate in the S prefix.
2019-03-31 10:13:28 -07:00
Unknown W. Brackets
0be3213151
interp: Correct vscl prefix handling.
2019-03-31 10:13:28 -07:00
Unknown W. Brackets
ec1dae57eb
interp: Fix vbfy prefix handling.
2019-03-31 10:09:18 -07:00
Henrik Rydgård and GitHub
2d2c0fab49
Merge pull request #11949 from unknownbrackets/vfpu-chunk1
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Skip IR for many unhandled prefixes, small interp correctness fixes
2019-03-31 19:06:16 +02:00
Unknown W. Brackets
d5273f589a
interp: Mask value in vpfxd.
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The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-31 08:23:36 -07:00
Unknown W. Brackets
9d1d4473e8
interp: Confirm vi2f/vf2i prefix handling.
2019-03-31 08:22:52 -07:00
Unknown W. Brackets
30223cb17f
interp: Apply T prefix to D in vcmov.
2019-03-31 08:22:15 -07:00
Unknown W. Brackets
fef8e71b8f
interp: Correct behavior for matrixes with size=1.
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Games don't (shouldn't?) actually use 1x1 matrices, but they seem to have
predictable behavior in matrix ops.
2019-03-31 08:21:29 -07:00
Unknown W. Brackets
cfab70f149
interp: Handle abs/neg on nan values better.
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`fabsf` was altering other bits.
2019-03-31 08:18:49 -07:00
Unknown W. Brackets
7dc775e54f
IR: Use interp for unhandled prefix cases.
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The interpreter is not changed yet, so in theory this shouldn't change
behavior.
2019-03-31 08:17:11 -07:00
Unknown W. Brackets and GitHub
62928e13d8
Merge pull request #11942 from jeeeyul/master
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Fixes iOS exit freezing, Selective PTRACE syscall
2019-03-27 19:14:34 -07:00
Jeeeyul Lee
53e254d352
Disables iOS exit animation to prevent freezing.
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Selective PTRACE sys call.
2019-03-27 11:01:20 +09:00
Henrik Rydgård
ed1aa74827
Address feedback from #11936 (support memory types without CACHED as a backup)
2019-03-26 10:39:51 +01:00
Henrik Rydgård and GitHub
87c7f2f534
Merge pull request #11938 from LunaMoo/texture_hotkeys
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Add texture dump/replace hotkeys.
2019-03-26 10:37:21 +01:00
LunaMoo
1fa7bbc816
Add texture dump/replace hotkeys.
2019-03-26 06:13:05 +01:00
Henrik Rydgård and GitHub
0b5909c09a
Merge pull request #11936 from hrydgard/vulkan-readback-cached-mem
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Vulkan: Request cached memory for readbacks.
2019-03-25 22:43:26 +01:00
Henrik Rydgård
60889767bf
Vulkan: Request cached memory for readbacks. First try coherent too but also support non-coherent cached memory.
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Should speed up readbacks slightly.
This is just a common sense optimization, I haven't measured it. Writes to
coherent non-cached memory is OK due to hardware write combining, but for
reads you really want cached to avoid a memory transaction for every
single read (instead reading full cache lines).
2019-03-25 21:40:25 +01:00
Henrik Rydgård and GitHub
47ce2fcbb8
Merge pull request #11933 from unknownbrackets/texcache
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TexCache: Align bufw properly even for VRAM
2019-03-25 08:10:32 +01:00
Unknown W. Brackets
1199008641
TexCache: Align bufw properly even for VRAM.
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Fixes minimap arrows in Manhunt 2 (see #9615.)
2019-03-24 19:21:08 -07:00
Henrik Rydgård and GitHub
8f4bafea9c
Merge pull request #11932 from unknownbrackets/funchash
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Debugger: Prevent saving a -1 sized func
2019-03-24 21:19:43 +01:00
Unknown W. Brackets
f53ea7e44f
Debugger: Prevent saving a -1 sized func.
2019-03-24 13:00:05 -07:00
Henrik Rydgård
8adb0dfd61
Vulkan validation: INFO level has gotten too spammy, turn it off.
2019-03-24 11:56:51 +01:00
Henrik Rydgård
d3c0a010a0
Fix invalid argument string for kuKernelLoadModule. Fixes #11895 .
2019-03-24 11:56:35 +01:00
Henrik Rydgård and GitHub
6cd7615cb0
Merge pull request #11924 from unknownbrackets/kernel-minor
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Allow kernel threads to beget kernel threads
2019-03-24 11:19:01 +01:00
Henrik Rydgård
703fdc5561
MSVC project files: Fix silly search/replace error from #11883
2019-03-24 11:17:47 +01:00
Henrik Rydgård and GitHub
85fcac20d9
Merge pull request #11926 from unknownbrackets/vfpu-ir
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IR: Correct vmmul optimizations
2019-03-24 11:17:22 +01:00
Henrik Rydgård and GitHub
4fce6784b3
Merge pull request #11925 from unknownbrackets/android-audio
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Android: Allow less common sample rates
2019-03-24 10:56:02 +01:00
Unknown W. Brackets
4c3aa841d3
IR: Correct vmmul optimizations.
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It's a bit confusing since it's not D = S*T, but rather D = S'*T.
2019-03-23 15:31:10 -07:00
Unknown W. Brackets
812e84e4a7
Android: Allow less common sample rates.
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Just assume anything we received is a valid one.
2019-03-23 12:12:13 -07:00
Unknown W. Brackets
f244b390ae
Kernel: Kernel threads can beget kernel threads.
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Fixes #7687 .
2019-03-23 12:05:06 -07:00
Henrik Rydgård and GitHub
50a5153c71
Merge pull request #11923 from unknownbrackets/rpi
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Fix build of Raspberry Pi with toolchain
2019-03-23 18:34:00 +01:00
Unknown W. Brackets
f042dc1773
SDL: Make it clear Vulkan check is not an error.
2019-03-23 08:32:51 -07:00
Unknown W. Brackets