Fix volatile ++/-- and anonymous enum arithmetic

Avoids the C++20 deprecation warnings (-Wdeprecated-volatile and
-Wdeprecated-anon-enum-enum-conversion). No behaviour change.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>

Core/Instance.cpp

@@ -168,11 +168,12 @@ void InitInstanceCounter() {
 		// so next keeps climbing across runs and eventually wraps this uint8_t. ID 0 is not a
 		// valid instance - it fails the IsFirstInstance() check, which quietly disables config
 		// saving - so skip past it.
-		if (++buf->next == 0) {
+		buf->next = (uint8_t)(buf->next + 1);
+		if (buf->next == 0) {
 			buf->next = 1;
 		}
 		PPSSPP_ID = buf->next;
-		buf->total++;
+		buf->total = (uint8_t)(buf->total + 1);
 	});
 	if (!success) {
 		PPSSPP_ID = 1;
@@ -181,7 +182,7 @@ void InitInstanceCounter() {
 
 void ShutdownInstanceCounter() {
 	UpdateInstanceCounter([](volatile InstanceInfo *buf) {
-		buf->total--;
+		buf->total = (uint8_t)(buf->total - 1);
 	});
 
 #if PPSSPP_PLATFORM(WINDOWS)

Core/MIPS/ARM64/Arm64IRCompFPU.cpp

@@ -128,7 +128,7 @@ void Arm64JitBackend::CompIR_FAssign(IRInst inst) {
 void Arm64JitBackend::CompIR_FCompare(IRInst inst) {
 	CONDITIONAL_DISABLE;
 
-	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + VFPU_CTRL_CC;
+	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + (int)VFPU_CTRL_CC;
 
 	switch (inst.op) {
 	case IROp::FCmp:

Core/MIPS/ARM64/Arm64IRRegCache.cpp

@@ -69,7 +69,7 @@ const int *Arm64IRRegCache::GetAllocationOrder(MIPSLoc type, MIPSMap flags, int
 		count = ARRAY_SIZE(allocationOrder);
 		return allocationOrder;
 	} else if (type == MIPSLoc::FREG) {
-		base = S0 - NUM_X_REGS;
+		base = S0 - (int)NUM_X_REGS;
 
 		// We don't really need four temps, probably.
 		// We start with S8 for call flushes.

Core/MIPS/LoongArch64/LoongArch64CompFPU.cpp

@@ -290,7 +290,7 @@ void LoongArch64JitBackend::CompIR_FSat(IRInst inst) {
 void LoongArch64JitBackend::CompIR_FCompare(IRInst inst) {
 	CONDITIONAL_DISABLE;
 
-	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + VFPU_CTRL_CC;
+	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + (int)VFPU_CTRL_CC;
 
 	switch (inst.op) {
 	case IROp::FCmp:

Core/MIPS/RiscV/RiscVCompFPU.cpp

@@ -305,7 +305,7 @@ void RiscVJitBackend::CompIR_FSat(IRInst inst) {
 void RiscVJitBackend::CompIR_FCompare(IRInst inst) {
 	CONDITIONAL_DISABLE;
 
-	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + VFPU_CTRL_CC;
+	constexpr IRReg IRREG_VFPU_CC = IRREG_VFPU_CTRL_BASE + (int)VFPU_CTRL_CC;
 
 	switch (inst.op) {
 	case IROp::FCmp: