mirror of
https://github.com/PCSX2/pcsx2.git
synced 2026-07-11 01:34:17 +02:00
Core: Use ARCH_ARM64 instead of _M_ARM64
fast_float assumes that _M_ARM64 means compiling for Windows
This commit is contained in:
+1
-1
@@ -81,7 +81,7 @@ No support will be provided, continue at your own risk.
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*********************************************************")
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*********************************************************")
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endif()
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endif()
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if(_M_ARM64)
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if(ARCH_ARM64)
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message(WARNING "
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message(WARNING "
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*************** UNSUPPORTED CONFIGURATION ***************
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*************** UNSUPPORTED CONFIGURATION ***************
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Apple Silicon support in PCSX2 is INCOMPLETE. There are
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Apple Silicon support in PCSX2 is INCOMPLETE. There are
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@@ -84,7 +84,7 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR
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option(DISABLE_ADVANCE_SIMD "Disable advance use of SIMD (SSE2+ & AVX)" OFF)
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option(DISABLE_ADVANCE_SIMD "Disable advance use of SIMD (SSE2+ & AVX)" OFF)
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list(APPEND PCSX2_DEFS _M_X86=1)
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list(APPEND PCSX2_DEFS _M_X86=1)
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set(_M_X86 TRUE)
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set(ARCH_X86 TRUE)
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if(DISABLE_ADVANCE_SIMD)
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if(DISABLE_ADVANCE_SIMD)
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message(STATUS "Building for x86-64 (Multi-ISA).")
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message(STATUS "Building for x86-64 (Multi-ISA).")
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else()
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else()
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@@ -113,9 +113,14 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR
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elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "arm64" OR "${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "aarch64" OR
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elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "arm64" OR "${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "aarch64" OR
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"${CMAKE_OSX_ARCHITECTURES}" STREQUAL "arm64")
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"${CMAKE_OSX_ARCHITECTURES}" STREQUAL "arm64")
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message(STATUS "Building for Apple Silicon (ARM64).")
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message(STATUS "Building for Apple Silicon (ARM64).")
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list(APPEND PCSX2_DEFS _M_ARM64=1)
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set(ARCH_ARM64 TRUE)
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set(_M_ARM64 TRUE)
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if(APPLE)
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add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1")
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# Min spec is an M1
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add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1")
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else()
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# Require atomic rmw instructions
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add_compile_options("-march=armv8.1-a")
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endif()
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# If we're running on Linux, we need to detect the page/cache line size.
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# If we're running on Linux, we need to detect the page/cache line size.
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# It could be a virtual machine with 4K pages, or 16K with Asahi.
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# It could be a virtual machine with 4K pages, or 16K with Asahi.
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@@ -132,9 +132,9 @@ add_subdirectory(3rdparty/demangler EXCLUDE_FROM_ALL)
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add_subdirectory(3rdparty/ccc EXCLUDE_FROM_ALL)
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add_subdirectory(3rdparty/ccc EXCLUDE_FROM_ALL)
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# Architecture-specific.
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# Architecture-specific.
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if(_M_X86)
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if(ARCH_X86)
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add_subdirectory(3rdparty/zydis EXCLUDE_FROM_ALL)
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add_subdirectory(3rdparty/zydis EXCLUDE_FROM_ALL)
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elseif(_M_ARM64)
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elseif(ARCH_ARM64)
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add_subdirectory(3rdparty/vixl EXCLUDE_FROM_ALL)
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add_subdirectory(3rdparty/vixl EXCLUDE_FROM_ALL)
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endif()
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endif()
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@@ -85,7 +85,7 @@ target_sources(common PRIVATE
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YAML.h
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YAML.h
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)
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)
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if(_M_X86)
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if(ARCH_X86)
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target_sources(common PRIVATE
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target_sources(common PRIVATE
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emitter/bmi.cpp
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emitter/bmi.cpp
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emitter/fpu.cpp
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emitter/fpu.cpp
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@@ -338,7 +338,7 @@ void* HostSys::Mmap(void* base, size_t size, const PageProtectionMode& mode)
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if (mode.IsNone())
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if (mode.IsNone())
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return nullptr;
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return nullptr;
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#ifdef __aarch64__
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#ifdef ARCH_ARM64
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// We can't allocate executable memory with mach_vm_allocate() on Apple Silicon.
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// We can't allocate executable memory with mach_vm_allocate() on Apple Silicon.
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// Instead, we need to use MAP_JIT with mmap(), which does not support fixed mappings.
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// Instead, we need to use MAP_JIT with mmap(), which does not support fixed mappings.
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if (mode.CanExecute())
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if (mode.CanExecute())
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@@ -441,7 +441,7 @@ void HostSys::UnmapSharedMemory(void* baseaddr, size_t size)
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pxFailRel("Failed to unmap shared memory");
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pxFailRel("Failed to unmap shared memory");
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}
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}
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#ifdef _M_ARM64
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#ifdef ARCH_ARM64
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void HostSys::FlushInstructionCache(void* address, u32 size)
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void HostSys::FlushInstructionCache(void* address, u32 size)
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{
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{
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@@ -518,7 +518,7 @@ bool SharedMemoryMappingArea::Unmap(void* map_base, size_t map_size)
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return true;
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return true;
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}
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}
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#ifdef _M_ARM64
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#ifdef ARCH_ARM64
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static thread_local int s_code_write_depth = 0;
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static thread_local int s_code_write_depth = 0;
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@@ -570,7 +570,7 @@ void HostSys::EndCodeWrite()
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}
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}
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}
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}
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#endif // _M_ARM64
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#endif // ARCH_ARM64
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#define USE_MACH_EXCEPTION_PORTS
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#define USE_MACH_EXCEPTION_PORTS
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@@ -589,11 +589,11 @@ namespace PageFaultHandler
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#ifdef USE_MACH_EXCEPTION_PORTS
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#ifdef USE_MACH_EXCEPTION_PORTS
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#if defined(_M_X86)
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#if defined(ARCH_X86)
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#define THREAD_STATE64_COUNT x86_THREAD_STATE64_COUNT
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#define THREAD_STATE64_COUNT x86_THREAD_STATE64_COUNT
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#define THREAD_STATE64 x86_THREAD_STATE64
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#define THREAD_STATE64 x86_THREAD_STATE64
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#define thread_state64_t x86_thread_state64_t
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#define thread_state64_t x86_thread_state64_t
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#elif defined(_M_ARM64)
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#elif defined(ARCH_ARM64)
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#define THREAD_STATE64_COUNT ARM_THREAD_STATE64_COUNT
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#define THREAD_STATE64_COUNT ARM_THREAD_STATE64_COUNT
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#define THREAD_STATE64 ARM_THREAD_STATE64
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#define THREAD_STATE64 ARM_THREAD_STATE64
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#define thread_state64_t arm_thread_state64_t
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#define thread_state64_t arm_thread_state64_t
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@@ -669,7 +669,7 @@ void PageFaultHandler::SignalHandler(mach_port_t port)
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{
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{
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s_in_exception_handler = true;
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s_in_exception_handler = true;
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#ifdef _M_ARM64
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#ifdef ARCH_ARM64
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result = HandlePageFault(reinterpret_cast<void*>(state->__pc), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
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result = HandlePageFault(reinterpret_cast<void*>(state->__pc), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
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#else
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#else
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result = HandlePageFault(reinterpret_cast<void*>(state->__rip), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
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result = HandlePageFault(reinterpret_cast<void*>(state->__rip), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
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@@ -774,12 +774,12 @@ bool PageFaultHandler::Install(Error* error)
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void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx)
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void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx)
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{
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{
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#if defined(_M_X86)
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#if defined(ARCH_X86)
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void* const exception_address =
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void* const exception_address =
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reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__faultvaddr);
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reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__faultvaddr);
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void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__rip);
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void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__rip);
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const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__err & 2) != 0;
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const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__err & 2) != 0;
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#elif defined(_M_ARM64)
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#elif defined(ARCH_ARM64)
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void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
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void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
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void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
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void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
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const bool is_write = IsStoreInstruction(exception_pc);
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const bool is_write = IsStoreInstruction(exception_pc);
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@@ -825,7 +825,7 @@ bool PageFaultHandler::Install(Error* error)
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return false;
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return false;
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}
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}
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#ifdef _M_ARM64
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#ifdef ARCH_ARM64
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if (sigaction(SIGSEGV, &sa, nullptr) != 0)
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if (sigaction(SIGSEGV, &sa, nullptr) != 0)
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{
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{
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Error::SetErrno(error, "sigaction() for SIGSEGV failed: ", errno);
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Error::SetErrno(error, "sigaction() for SIGSEGV failed: ", errno);
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@@ -34,9 +34,9 @@ __forceinline void Threading::SpinWait()
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{
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{
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// If this doesn't compile you can just comment it out (it only serves as a
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// If this doesn't compile you can just comment it out (it only serves as a
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// performance hint and isn't required).
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// performance hint and isn't required).
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#if defined(_M_X86)
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#if defined(ARCH_X86)
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__asm__("pause");
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__asm__("pause");
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#elif defined(_M_ARM64)
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#elif defined(ARCH_ARM64)
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__asm__ __volatile__("isb");
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__asm__ __volatile__("isb");
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#endif
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#endif
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}
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}
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+2
-2
@@ -20,7 +20,7 @@ enum class FPRoundMode : u8
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struct FPControlRegister
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struct FPControlRegister
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{
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{
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#ifdef _M_X86
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#ifdef ARCH_X86
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u32 bitmask;
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u32 bitmask;
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static constexpr u32 EXCEPTION_MASK = (0x3Fu << 7);
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static constexpr u32 EXCEPTION_MASK = (0x3Fu << 7);
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@@ -101,7 +101,7 @@ struct FPControlRegister
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__fi constexpr bool operator==(const FPControlRegister& rhs) const { return bitmask == rhs.bitmask; }
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__fi constexpr bool operator==(const FPControlRegister& rhs) const { return bitmask == rhs.bitmask; }
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__fi constexpr bool operator!=(const FPControlRegister& rhs) const { return bitmask != rhs.bitmask; }
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__fi constexpr bool operator!=(const FPControlRegister& rhs) const { return bitmask != rhs.bitmask; }
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#elif defined(_M_ARM64)
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#elif defined(ARCH_ARM64)
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u64 bitmask;
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u64 bitmask;
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|
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static constexpr u64 FZ_BIT = (0x1ULL << 24);
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static constexpr u64 FZ_BIT = (0x1ULL << 24);
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+3
-3
@@ -4,7 +4,7 @@
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#include "FastJmp.h"
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#include "FastJmp.h"
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|
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// Win32 uses Fastjmp.asm, because MSVC doesn't support inline asm.
|
// Win32 uses Fastjmp.asm, because MSVC doesn't support inline asm.
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#if !defined(_WIN32) || defined(_M_ARM64)
|
#if !defined(_WIN32) || defined(ARCH_ARM64)
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|
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#if defined(__APPLE__)
|
#if defined(__APPLE__)
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#define PREFIX "_"
|
#define PREFIX "_"
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@@ -12,7 +12,7 @@
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#define PREFIX ""
|
#define PREFIX ""
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#endif
|
#endif
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|
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#if defined(_M_X86)
|
#if defined(ARCH_X86)
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|
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asm(
|
asm(
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"\t.global " PREFIX "fastjmp_set\n"
|
"\t.global " PREFIX "fastjmp_set\n"
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@@ -46,7 +46,7 @@ asm(
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jmp *%rdx
|
jmp *%rdx
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)");
|
)");
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|
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#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
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|
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asm(
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asm(
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"\t.global " PREFIX "fastjmp_set\n"
|
"\t.global " PREFIX "fastjmp_set\n"
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+1
-1
@@ -10,7 +10,7 @@ struct fastjmp_buf
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{
|
{
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#if defined(_WIN32)
|
#if defined(_WIN32)
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static constexpr std::size_t BUF_SIZE = 240;
|
static constexpr std::size_t BUF_SIZE = 240;
|
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#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
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static constexpr std::size_t BUF_SIZE = 168;
|
static constexpr std::size_t BUF_SIZE = 168;
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#else
|
#else
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static constexpr std::size_t BUF_SIZE = 64;
|
static constexpr std::size_t BUF_SIZE = 64;
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+3
-3
@@ -13,7 +13,7 @@ static u32 PAUSE_TIME = 0;
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|
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static void MultiPause()
|
static void MultiPause()
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{
|
{
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#ifdef _M_X86
|
#ifdef ARCH_X86
|
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_mm_pause();
|
_mm_pause();
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_mm_pause();
|
_mm_pause();
|
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_mm_pause();
|
_mm_pause();
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@@ -22,7 +22,7 @@ static void MultiPause()
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_mm_pause();
|
_mm_pause();
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_mm_pause();
|
_mm_pause();
|
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_mm_pause();
|
_mm_pause();
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#elif defined(_M_ARM64) && defined(_MSC_VER)
|
#elif defined(ARCH_ARM64) && defined(_MSC_VER)
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
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@@ -31,7 +31,7 @@ static void MultiPause()
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
|
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__isb(_ARM64_BARRIER_SY);
|
__isb(_ARM64_BARRIER_SY);
|
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#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
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__asm__ __volatile__("isb");
|
__asm__ __volatile__("isb");
|
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__asm__ __volatile__("isb");
|
__asm__ __volatile__("isb");
|
||||||
__asm__ __volatile__("isb");
|
__asm__ __volatile__("isb");
|
||||||
|
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+2
-2
@@ -107,7 +107,7 @@ namespace HostSys
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extern void UnmapSharedMemory(void* baseaddr, size_t size);
|
extern void UnmapSharedMemory(void* baseaddr, size_t size);
|
||||||
|
|
||||||
/// JIT write protect for Apple Silicon. Needs to be called prior to writing to any RWX pages.
|
/// JIT write protect for Apple Silicon. Needs to be called prior to writing to any RWX pages.
|
||||||
#if !defined(__APPLE__) || !defined(_M_ARM64)
|
#if !defined(__APPLE__) || !defined(ARCH_ARM64)
|
||||||
// clang-format -off
|
// clang-format -off
|
||||||
[[maybe_unused]] __fi static void BeginCodeWrite() {}
|
[[maybe_unused]] __fi static void BeginCodeWrite() {}
|
||||||
[[maybe_unused]] __fi static void EndCodeWrite() {}
|
[[maybe_unused]] __fi static void EndCodeWrite() {}
|
||||||
@@ -119,7 +119,7 @@ namespace HostSys
|
|||||||
|
|
||||||
/// Flushes the instruction cache on the host for the specified range.
|
/// Flushes the instruction cache on the host for the specified range.
|
||||||
/// Only needed on ARM64, X86 has coherent D/I cache.
|
/// Only needed on ARM64, X86 has coherent D/I cache.
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
[[maybe_unused]] __fi static void FlushInstructionCache(void* address, u32 size) {}
|
[[maybe_unused]] __fi static void FlushInstructionCache(void* address, u32 size) {}
|
||||||
#else
|
#else
|
||||||
void FlushInstructionCache(void* address, u32 size);
|
void FlushInstructionCache(void* address, u32 size);
|
||||||
|
|||||||
@@ -243,7 +243,7 @@ namespace PageFaultHandler
|
|||||||
static bool s_installed = false;
|
static bool s_installed = false;
|
||||||
} // namespace PageFaultHandler
|
} // namespace PageFaultHandler
|
||||||
|
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
|
|
||||||
void HostSys::FlushInstructionCache(void* address, u32 size)
|
void HostSys::FlushInstructionCache(void* address, u32 size)
|
||||||
{
|
{
|
||||||
@@ -285,7 +285,7 @@ void HostSys::FlushInstructionCache(void* address, u32 size)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif // _M_ARM64
|
#endif // ARCH_ARM64
|
||||||
|
|
||||||
namespace PageFaultHandler
|
namespace PageFaultHandler
|
||||||
{
|
{
|
||||||
@@ -297,21 +297,21 @@ void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx)
|
|||||||
#if defined(__linux__)
|
#if defined(__linux__)
|
||||||
void* const exception_address = reinterpret_cast<void*>(info->si_addr);
|
void* const exception_address = reinterpret_cast<void*>(info->si_addr);
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_RIP]);
|
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_RIP]);
|
||||||
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_ERR] & 2) != 0;
|
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_ERR] & 2) != 0;
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.pc);
|
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.pc);
|
||||||
const bool is_write = IsStoreInstruction(exception_pc);
|
const bool is_write = IsStoreInstruction(exception_pc);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#elif defined(__FreeBSD__)
|
#elif defined(__FreeBSD__)
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_addr);
|
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_addr);
|
||||||
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_rip);
|
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_rip);
|
||||||
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_err & 2) != 0;
|
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_err & 2) != 0;
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
|
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
|
||||||
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
|
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
|
||||||
const bool is_write = IsStoreInstruction(exception_pc);
|
const bool is_write = IsStoreInstruction(exception_pc);
|
||||||
@@ -358,7 +358,7 @@ bool PageFaultHandler::Install(Error* error)
|
|||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
// We can get SIGBUS on ARM64.
|
// We can get SIGBUS on ARM64.
|
||||||
if (sigaction(SIGBUS, &sa, nullptr) != 0)
|
if (sigaction(SIGBUS, &sa, nullptr) != 0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -41,9 +41,9 @@ __forceinline void Threading::SpinWait()
|
|||||||
{
|
{
|
||||||
// If this doesn't compile you can just comment it out (it only serves as a
|
// If this doesn't compile you can just comment it out (it only serves as a
|
||||||
// performance hint and isn't required).
|
// performance hint and isn't required).
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
__asm__("pause");
|
__asm__("pause");
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
__asm__ __volatile__("isb");
|
__asm__ __volatile__("isb");
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|||||||
+10
-2
@@ -23,12 +23,20 @@ static constexpr bool IsDebugBuild = true;
|
|||||||
static constexpr bool IsDebugBuild = false;
|
static constexpr bool IsDebugBuild = false;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(_M_ARM64) || defined(__aarch64__)
|
||||||
|
#define ARCH_ARM64
|
||||||
|
#elif defined(_M_X86) || defined(__x86_64__) || defined(__i386__)
|
||||||
|
#define ARCH_X86
|
||||||
|
#else
|
||||||
|
#error Unsupported Platform
|
||||||
|
#endif
|
||||||
|
|
||||||
// Defines the memory page size for the target platform at compilation.
|
// Defines the memory page size for the target platform at compilation.
|
||||||
#if defined(OVERRIDE_HOST_PAGE_SIZE)
|
#if defined(OVERRIDE_HOST_PAGE_SIZE)
|
||||||
static constexpr unsigned int __pagesize = OVERRIDE_HOST_PAGE_SIZE;
|
static constexpr unsigned int __pagesize = OVERRIDE_HOST_PAGE_SIZE;
|
||||||
static constexpr unsigned int __pagemask = __pagesize - 1;
|
static constexpr unsigned int __pagemask = __pagesize - 1;
|
||||||
static constexpr unsigned int __pageshift = std::bit_width(__pagemask);
|
static constexpr unsigned int __pageshift = std::bit_width(__pagemask);
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
// Apple Silicon uses 16KB pages and 128 byte cache lines.
|
// Apple Silicon uses 16KB pages and 128 byte cache lines.
|
||||||
static constexpr unsigned int __pagesize = 0x4000;
|
static constexpr unsigned int __pagesize = 0x4000;
|
||||||
static constexpr unsigned int __pageshift = 14;
|
static constexpr unsigned int __pageshift = 14;
|
||||||
@@ -41,7 +49,7 @@ static constexpr bool IsDebugBuild = false;
|
|||||||
#endif
|
#endif
|
||||||
#if defined(OVERRIDE_HOST_CACHE_LINE_SIZE)
|
#if defined(OVERRIDE_HOST_CACHE_LINE_SIZE)
|
||||||
static constexpr unsigned int __cachelinesize = OVERRIDE_HOST_CACHE_LINE_SIZE;
|
static constexpr unsigned int __cachelinesize = OVERRIDE_HOST_CACHE_LINE_SIZE;
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
static constexpr unsigned int __cachelinesize = 128;
|
static constexpr unsigned int __cachelinesize = 128;
|
||||||
#else
|
#else
|
||||||
static constexpr unsigned int __cachelinesize = 64;
|
static constexpr unsigned int __cachelinesize = 64;
|
||||||
|
|||||||
+2
-2
@@ -138,9 +138,9 @@ namespace Perf
|
|||||||
pxAssertRel(perf_marker != MAP_FAILED, "Map perf marker");
|
pxAssertRel(perf_marker != MAP_FAILED, "Map perf marker");
|
||||||
|
|
||||||
JITDUMP_HEADER jh = {};
|
JITDUMP_HEADER jh = {};
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
jh.elf_mach = EM_X86_64;
|
jh.elf_mach = EM_X86_64;
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
jh.elf_mach = EM_AARCH64;
|
jh.elf_mach = EM_AARCH64;
|
||||||
#else
|
#else
|
||||||
#error Unhandled architecture.
|
#error Unhandled architecture.
|
||||||
|
|||||||
@@ -15,7 +15,7 @@
|
|||||||
|
|
||||||
#include <cstring>
|
#include <cstring>
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
|
|
||||||
// Can't stick them in structs because it breaks calling convention things, yay
|
// Can't stick them in structs because it breaks calling convention things, yay
|
||||||
using r128 = __m128i;
|
using r128 = __m128i;
|
||||||
@@ -102,7 +102,7 @@ using r128 = __m128i;
|
|||||||
_mm_store_ps((float*)&dest, _mm_setzero_ps());
|
_mm_store_ps((float*)&dest, _mm_setzero_ps());
|
||||||
}
|
}
|
||||||
|
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
|
|
||||||
using r128 = uint32x4_t;
|
using r128 = uint32x4_t;
|
||||||
|
|
||||||
|
|||||||
@@ -14,16 +14,7 @@
|
|||||||
#include <string_view>
|
#include <string_view>
|
||||||
#include <vector>
|
#include <vector>
|
||||||
|
|
||||||
// Work around us defining _M_ARM64 but fast_float thinking that it means MSVC.
|
|
||||||
#if defined(_M_ARM64) && !defined(_WIN32)
|
|
||||||
#define HAD_M_ARM64 _M_ARM64
|
|
||||||
#undef _M_ARM64
|
|
||||||
#endif
|
|
||||||
#include "fast_float/fast_float.h"
|
#include "fast_float/fast_float.h"
|
||||||
#if defined(HAD_M_ARM64) && !defined(_WIN32)
|
|
||||||
#define _M_ARM64 HAD_M_ARM64
|
|
||||||
#undef HAD_M_ARM64
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Older versions of libstdc++ are missing support for from_chars() with floats, and was only recently
|
// Older versions of libstdc++ are missing support for from_chars() with floats, and was only recently
|
||||||
// merged in libc++. So, just fall back to stringstream (yuck!) on everywhere except MSVC.
|
// merged in libc++. So, just fall back to stringstream (yuck!) on everywhere except MSVC.
|
||||||
|
|||||||
@@ -5,7 +5,9 @@
|
|||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#include "common/Pcsx2Defs.h"
|
||||||
|
|
||||||
|
#if defined(ARCH_X86)
|
||||||
|
|
||||||
#ifdef _MSC_VER
|
#ifdef _MSC_VER
|
||||||
#include <intrin.h>
|
#include <intrin.h>
|
||||||
@@ -35,7 +37,7 @@
|
|||||||
#include <smmintrin.h>
|
#include <smmintrin.h>
|
||||||
#include <immintrin.h>
|
#include <immintrin.h>
|
||||||
|
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
#include <arm_neon.h>
|
#include <arm_neon.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
@@ -128,7 +128,7 @@ size_t HostSys::GetRuntimeCacheLineSize()
|
|||||||
return max_line_size;
|
return max_line_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
|
|
||||||
void HostSys::FlushInstructionCache(void* address, u32 size)
|
void HostSys::FlushInstructionCache(void* address, u32 size)
|
||||||
{
|
{
|
||||||
@@ -338,9 +338,9 @@ LONG PageFaultHandler::ExceptionHandler(PEXCEPTION_POINTERS exi)
|
|||||||
if (exi->ExceptionRecord->ExceptionCode != EXCEPTION_ACCESS_VIOLATION)
|
if (exi->ExceptionRecord->ExceptionCode != EXCEPTION_ACCESS_VIOLATION)
|
||||||
return EXCEPTION_CONTINUE_SEARCH;
|
return EXCEPTION_CONTINUE_SEARCH;
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Rip);
|
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Rip);
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Pc);
|
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Pc);
|
||||||
#else
|
#else
|
||||||
void* const exception_pc = nullptr;
|
void* const exception_pc = nullptr;
|
||||||
|
|||||||
@@ -20,7 +20,7 @@ __fi void Threading::Timeslice()
|
|||||||
// improve performance and reduce cpu power consumption.
|
// improve performance and reduce cpu power consumption.
|
||||||
__fi void Threading::SpinWait()
|
__fi void Threading::SpinWait()
|
||||||
{
|
{
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
_mm_pause();
|
_mm_pause();
|
||||||
#else
|
#else
|
||||||
YieldProcessor();
|
YieldProcessor();
|
||||||
@@ -107,7 +107,7 @@ Threading::ThreadHandle& Threading::ThreadHandle::operator=(const ThreadHandle&
|
|||||||
|
|
||||||
u64 Threading::ThreadHandle::GetCPUTime() const
|
u64 Threading::ThreadHandle::GetCPUTime() const
|
||||||
{
|
{
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
u64 ret = 0;
|
u64 ret = 0;
|
||||||
if (m_native_handle)
|
if (m_native_handle)
|
||||||
QueryThreadCycleTime((HANDLE)m_native_handle, &ret);
|
QueryThreadCycleTime((HANDLE)m_native_handle, &ret);
|
||||||
@@ -208,7 +208,7 @@ Threading::ThreadHandle& Threading::Thread::operator=(Thread&& thread)
|
|||||||
|
|
||||||
u64 Threading::GetThreadCpuTime()
|
u64 Threading::GetThreadCpuTime()
|
||||||
{
|
{
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
u64 ret = 0;
|
u64 ret = 0;
|
||||||
QueryThreadCycleTime(GetCurrentThread(), &ret);
|
QueryThreadCycleTime(GetCurrentThread(), &ret);
|
||||||
return ret;
|
return ret;
|
||||||
@@ -225,7 +225,7 @@ u64 Threading::GetThreadCpuTime()
|
|||||||
|
|
||||||
u64 Threading::GetThreadTicksPerSecond()
|
u64 Threading::GetThreadTicksPerSecond()
|
||||||
{
|
{
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
// On x86, despite what the MS documentation says, this basically appears to be rdtsc.
|
// On x86, despite what the MS documentation says, this basically appears to be rdtsc.
|
||||||
// So, the frequency is our base clock speed (and stable regardless of power management).
|
// So, the frequency is our base clock speed (and stable regardless of power management).
|
||||||
static u64 frequency = 0;
|
static u64 frequency = 0;
|
||||||
|
|||||||
@@ -470,12 +470,12 @@ set(pcsx2GSSourcesUnshared
|
|||||||
GS/Renderers/SW/GSRendererSW.cpp
|
GS/Renderers/SW/GSRendererSW.cpp
|
||||||
)
|
)
|
||||||
|
|
||||||
if(_M_X86)
|
if(ARCH_X86)
|
||||||
list(APPEND pcsx2GSSourcesUnshared
|
list(APPEND pcsx2GSSourcesUnshared
|
||||||
GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.cpp
|
GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.cpp
|
||||||
GS/Renderers/SW/GSSetupPrimCodeGenerator.all.cpp
|
GS/Renderers/SW/GSSetupPrimCodeGenerator.all.cpp
|
||||||
)
|
)
|
||||||
elseif(_M_ARM64)
|
elseif(ARCH_ARM64)
|
||||||
list(APPEND pcsx2GSSourcesUnshared
|
list(APPEND pcsx2GSSourcesUnshared
|
||||||
GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.cpp
|
GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.cpp
|
||||||
GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.cpp
|
GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.cpp
|
||||||
@@ -564,14 +564,14 @@ set(pcsx2GSHeaders
|
|||||||
GS/Renderers/SW/GSVertexSW.h
|
GS/Renderers/SW/GSVertexSW.h
|
||||||
)
|
)
|
||||||
|
|
||||||
if(_M_X86)
|
if(ARCH_X86)
|
||||||
list(APPEND pcsx2GSHeaders
|
list(APPEND pcsx2GSHeaders
|
||||||
GS/GSVector4.h
|
GS/GSVector4.h
|
||||||
GS/GSVector4i.h
|
GS/GSVector4i.h
|
||||||
GS/GSVector8.h
|
GS/GSVector8.h
|
||||||
GS/GSVector8i.h
|
GS/GSVector8i.h
|
||||||
)
|
)
|
||||||
elseif(_M_ARM64)
|
elseif(ARCH_ARM64)
|
||||||
list(APPEND pcsx2GSHeaders
|
list(APPEND pcsx2GSHeaders
|
||||||
GS/GSVector4_arm64.h
|
GS/GSVector4_arm64.h
|
||||||
GS/GSVector4i_arm64.h
|
GS/GSVector4i_arm64.h
|
||||||
@@ -746,7 +746,7 @@ set(pcsx2IPUHeaders
|
|||||||
IPU/yuv2rgb.h
|
IPU/yuv2rgb.h
|
||||||
)
|
)
|
||||||
|
|
||||||
if(DISABLE_ADVANCE_SIMD)
|
if(DISABLE_ADVANCE_SIMD AND ARCH_X86)
|
||||||
target_compile_definitions(PCSX2 PUBLIC MULTI_ISA_SHARED_COMPILATION)
|
target_compile_definitions(PCSX2 PUBLIC MULTI_ISA_SHARED_COMPILATION)
|
||||||
if(USE_GCC)
|
if(USE_GCC)
|
||||||
target_link_options(PCSX2_FLAGS INTERFACE -Wno-odr)
|
target_link_options(PCSX2_FLAGS INTERFACE -Wno-odr)
|
||||||
@@ -1071,10 +1071,10 @@ set(pcsx2LTOSources
|
|||||||
${pcsx2GSHeaders}
|
${pcsx2GSHeaders}
|
||||||
)
|
)
|
||||||
|
|
||||||
if(_M_X86)
|
if(ARCH_X86)
|
||||||
list(APPEND pcsx2LTOSources ${pcsx2x86Sources} ${pcsx2x86Headers})
|
list(APPEND pcsx2LTOSources ${pcsx2x86Sources} ${pcsx2x86Headers})
|
||||||
target_link_libraries(PCSX2_FLAGS INTERFACE zydis)
|
target_link_libraries(PCSX2_FLAGS INTERFACE zydis)
|
||||||
elseif(_M_ARM64)
|
elseif(ARCH_ARM64)
|
||||||
list(APPEND pcsx2LTOSources ${pcsx2arm64Sources} ${pcsx2arm64Headers})
|
list(APPEND pcsx2LTOSources ${pcsx2arm64Sources} ${pcsx2arm64Headers})
|
||||||
target_link_libraries(PCSX2_FLAGS INTERFACE vixl)
|
target_link_libraries(PCSX2_FLAGS INTERFACE vixl)
|
||||||
endif()
|
endif()
|
||||||
@@ -1202,7 +1202,7 @@ else()
|
|||||||
endif()
|
endif()
|
||||||
|
|
||||||
# additonal include directories
|
# additonal include directories
|
||||||
if(_M_X86)
|
if(ARCH_X86)
|
||||||
target_include_directories(PCSX2_FLAGS INTERFACE "${CMAKE_SOURCE_DIR}/3rdparty/xbyak")
|
target_include_directories(PCSX2_FLAGS INTERFACE "${CMAKE_SOURCE_DIR}/3rdparty/xbyak")
|
||||||
target_compile_definitions(PCSX2_FLAGS INTERFACE XBYAK_NO_EXCEPTION)
|
target_compile_definitions(PCSX2_FLAGS INTERFACE XBYAK_NO_EXCEPTION)
|
||||||
endif()
|
endif()
|
||||||
|
|||||||
@@ -5117,7 +5117,7 @@ __forceinline void GSState::VertexKick(u32 skip)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
// We only care about the xy passing the skip test. zw is the offset coordinates for native culling.
|
// We only care about the xy passing the skip test. zw is the offset coordinates for native culling.
|
||||||
skip |= test.mask() & 0xff;
|
skip |= test.mask() & 0xff;
|
||||||
#else
|
#else
|
||||||
|
|||||||
+1
-1
@@ -282,7 +282,7 @@ GSRendererType GSUtil::GetPreferredRenderer()
|
|||||||
#if defined(__APPLE__)
|
#if defined(__APPLE__)
|
||||||
// Mac: Prefer Metal hardware.
|
// Mac: Prefer Metal hardware.
|
||||||
preferred_renderer = GSRendererType::Metal;
|
preferred_renderer = GSRendererType::Metal;
|
||||||
#elif defined(_WIN32) && defined(_M_ARM64)
|
#elif defined(_WIN32) && defined(ARCH_ARM64)
|
||||||
// Default to DX12 on Windows-on-ARM.
|
// Default to DX12 on Windows-on-ARM.
|
||||||
preferred_renderer = GSRendererType::DX12;
|
preferred_renderer = GSRendererType::DX12;
|
||||||
#elif defined(_WIN32)
|
#elif defined(_WIN32)
|
||||||
|
|||||||
+8
-8
@@ -84,7 +84,7 @@ typedef GSVector2T<int> GSVector2i;
|
|||||||
class GSVector4;
|
class GSVector4;
|
||||||
class GSVector4i;
|
class GSVector4i;
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
#if _M_SSE >= 0x500
|
#if _M_SSE >= 0x500
|
||||||
|
|
||||||
class GSVector8;
|
class GSVector8;
|
||||||
@@ -103,7 +103,7 @@ class GSVector8i;
|
|||||||
#include "GSVector8i.h"
|
#include "GSVector8i.h"
|
||||||
#include "GSVector8.h"
|
#include "GSVector8.h"
|
||||||
|
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
#include "GSVector4i_arm64.h"
|
#include "GSVector4i_arm64.h"
|
||||||
#include "GSVector4_arm64.h"
|
#include "GSVector4_arm64.h"
|
||||||
#endif
|
#endif
|
||||||
@@ -112,9 +112,9 @@ class GSVector8i;
|
|||||||
|
|
||||||
__forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate)
|
__forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate)
|
||||||
{
|
{
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
m = truncate ? _mm_cvttps_epi32(v) : _mm_cvtps_epi32(v);
|
m = truncate ? _mm_cvttps_epi32(v) : _mm_cvtps_epi32(v);
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
// GS thread uses default (nearest) rounding.
|
// GS thread uses default (nearest) rounding.
|
||||||
v4s = truncate ? vcvtq_s32_f32(v.v4s) : vcvtnq_u32_f32(v.v4s);
|
v4s = truncate ? vcvtq_s32_f32(v.v4s) : vcvtnq_u32_f32(v.v4s);
|
||||||
#endif
|
#endif
|
||||||
@@ -122,9 +122,9 @@ __forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate)
|
|||||||
|
|
||||||
__forceinline_odr GSVector4::GSVector4(const GSVector4i& v)
|
__forceinline_odr GSVector4::GSVector4(const GSVector4i& v)
|
||||||
{
|
{
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
m = _mm_cvtepi32_ps(v);
|
m = _mm_cvtepi32_ps(v);
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
v4s = vcvtq_f32_s32(v.v4s);
|
v4s = vcvtq_f32_s32(v.v4s);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
@@ -168,7 +168,7 @@ __forceinline_odr void GSVector8i::sw32_inv(GSVector8i& a, GSVector8i& b)
|
|||||||
|
|
||||||
__forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v)
|
__forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v)
|
||||||
{
|
{
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
return GSVector4i(_mm_castps_si128(v.m));
|
return GSVector4i(_mm_castps_si128(v.m));
|
||||||
#else
|
#else
|
||||||
return GSVector4i(vreinterpretq_s32_f32(v.v4s));
|
return GSVector4i(vreinterpretq_s32_f32(v.v4s));
|
||||||
@@ -177,7 +177,7 @@ __forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v)
|
|||||||
|
|
||||||
__forceinline_odr GSVector4 GSVector4::cast(const GSVector4i& v)
|
__forceinline_odr GSVector4 GSVector4::cast(const GSVector4i& v)
|
||||||
{
|
{
|
||||||
#ifndef _M_ARM64
|
#ifndef ARCH_ARM64
|
||||||
return GSVector4(_mm_castsi128_ps(v.m));
|
return GSVector4(_mm_castsi128_ps(v.m));
|
||||||
#else
|
#else
|
||||||
return GSVector4(vreinterpretq_f32_s32(v.v4s));
|
return GSVector4(vreinterpretq_f32_s32(v.v4s));
|
||||||
|
|||||||
@@ -21,12 +21,12 @@ struct alignas(32) GSVertex
|
|||||||
u32 FOG; // FOG:28
|
u32 FOG; // FOG:28
|
||||||
};
|
};
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
#if _M_SSE >= 0x500
|
#if _M_SSE >= 0x500
|
||||||
__m256i mx;
|
__m256i mx;
|
||||||
#endif
|
#endif
|
||||||
__m128i m[2];
|
__m128i m[2];
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
int32x4_t m[2];
|
int32x4_t m[2];
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|||||||
@@ -7,7 +7,7 @@
|
|||||||
#include "GS/GSExtra.h"
|
#include "GS/GSExtra.h"
|
||||||
#include "Host.h"
|
#include "Host.h"
|
||||||
|
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
#include "GS/Renderers/Vulkan/GSDeviceVK.h"
|
#include "GS/Renderers/Vulkan/GSDeviceVK.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@@ -457,7 +457,7 @@ GSRendererType D3D::GetPreferredRenderer()
|
|||||||
default:
|
default:
|
||||||
{
|
{
|
||||||
// Default is D3D11, but prefer DX12 on ARM (better drivers).
|
// Default is D3D11, but prefer DX12 on ARM (better drivers).
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
return GSRendererType::DX12;
|
return GSRendererType::DX12;
|
||||||
#else
|
#else
|
||||||
return GSRendererType::DX11;
|
return GSRendererType::DX11;
|
||||||
|
|||||||
@@ -5,11 +5,11 @@
|
|||||||
|
|
||||||
#include "GS/GSState.h"
|
#include "GS/GSState.h"
|
||||||
|
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.all.h"
|
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.all.h"
|
||||||
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.h"
|
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.h"
|
||||||
#endif
|
#endif
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.h"
|
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.h"
|
||||||
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.h"
|
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.h"
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -157,7 +157,7 @@ struct alignas(32) GSScanlineGlobalData // per batch variables, this is like a p
|
|||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
// Mini version of constant data for ARM64, we don't need all of it
|
// Mini version of constant data for ARM64, we don't need all of it
|
||||||
alignas(16) u32 const_test_128b[8][4] = {
|
alignas(16) u32 const_test_128b[8][4] = {
|
||||||
{0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
{0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
||||||
|
|||||||
+2
-2
@@ -105,7 +105,7 @@ struct Gif_Tag
|
|||||||
|
|
||||||
__ri void analyzeTag()
|
__ri void analyzeTag()
|
||||||
{
|
{
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
// zero out bits for registers which shouldn't be tested
|
// zero out bits for registers which shouldn't be tested
|
||||||
__m128i vregs = _mm_loadl_epi64(reinterpret_cast<const __m128i*>(tag.REGS));
|
__m128i vregs = _mm_loadl_epi64(reinterpret_cast<const __m128i*>(tag.REGS));
|
||||||
vregs = _mm_and_si128(vregs, _mm_srli_epi64(_mm_set1_epi32(0xFFFFFFFFu), (64 - nRegs * 4)));
|
vregs = _mm_and_si128(vregs, _mm_srli_epi64(_mm_set1_epi32(0xFFFFFFFFu), (64 - nRegs * 4)));
|
||||||
@@ -118,7 +118,7 @@ struct Gif_Tag
|
|||||||
|
|
||||||
// write out unpacked registers
|
// write out unpacked registers
|
||||||
_mm_storeu_si128(reinterpret_cast<__m128i*>(regs), vregs);
|
_mm_storeu_si128(reinterpret_cast<__m128i*>(regs), vregs);
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
// zero out bits for registers which shouldn't be tested
|
// zero out bits for registers which shouldn't be tested
|
||||||
u64 REGS64;
|
u64 REGS64;
|
||||||
std::memcpy(®S64, tag.REGS, sizeof(u64));
|
std::memcpy(®S64, tag.REGS, sizeof(u64));
|
||||||
|
|||||||
@@ -1374,7 +1374,7 @@ __fi static bool mpeg2_slice()
|
|||||||
//Cr bias - 8 * 8
|
//Cr bias - 8 * 8
|
||||||
//Cb bias - 8 * 8
|
//Cb bias - 8 * 8
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
__m128i zeroreg = _mm_setzero_si128();
|
__m128i zeroreg = _mm_setzero_si128();
|
||||||
|
|
||||||
for (uint i = 0; i < (256+64+64) / 32; ++i)
|
for (uint i = 0; i < (256+64+64) / 32; ++i)
|
||||||
@@ -1389,7 +1389,7 @@ __fi static bool mpeg2_slice()
|
|||||||
s += 32;
|
s += 32;
|
||||||
d += 32;
|
d += 32;
|
||||||
}
|
}
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
uint8x16_t zeroreg = vmovq_n_u8(0);
|
uint8x16_t zeroreg = vmovq_n_u8(0);
|
||||||
|
|
||||||
for (uint i = 0; i < (256 + 64 + 64) / 32; ++i)
|
for (uint i = 0; i < (256 + 64 + 64) / 32; ++i)
|
||||||
|
|||||||
@@ -42,7 +42,7 @@ void yuv2rgb_reference(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
|
|
||||||
// Suikoden Tactics FMV speed results: Reference - ~72fps, SSE2 - ~120fps
|
// Suikoden Tactics FMV speed results: Reference - ~72fps, SSE2 - ~120fps
|
||||||
// An AVX2 version is only slightly faster than an SSE2 version (+2-3fps)
|
// An AVX2 version is only slightly faster than an SSE2 version (+2-3fps)
|
||||||
@@ -136,7 +136,7 @@ __ri void yuv2rgb_sse2()
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
|
|
||||||
#if defined(_MSC_VER) && !defined(__clang__)
|
#if defined(_MSC_VER) && !defined(__clang__)
|
||||||
#include <arm64_neon.h>
|
#include <arm64_neon.h>
|
||||||
|
|||||||
+2
-2
@@ -7,12 +7,12 @@
|
|||||||
|
|
||||||
MULTI_ISA_DEF(extern void yuv2rgb_reference();)
|
MULTI_ISA_DEF(extern void yuv2rgb_reference();)
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
|
|
||||||
#define yuv2rgb yuv2rgb_sse2
|
#define yuv2rgb yuv2rgb_sse2
|
||||||
MULTI_ISA_DEF(extern void yuv2rgb_sse2();)
|
MULTI_ISA_DEF(extern void yuv2rgb_sse2();)
|
||||||
|
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
|
|
||||||
#define yuv2rgb yuv2rgb_neon
|
#define yuv2rgb yuv2rgb_neon
|
||||||
MULTI_ISA_DEF(extern void yuv2rgb_neon();)
|
MULTI_ISA_DEF(extern void yuv2rgb_neon();)
|
||||||
|
|||||||
+5
-5
@@ -207,7 +207,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error)
|
|||||||
{
|
{
|
||||||
#define COMMON_DOWNLOAD_MESSAGE "PCSX2 builds can be downloaded from https://pcsx2.net/downloads/"
|
#define COMMON_DOWNLOAD_MESSAGE "PCSX2 builds can be downloaded from https://pcsx2.net/downloads/"
|
||||||
|
|
||||||
#if defined(_M_X86)
|
#if defined(ARCH_X86)
|
||||||
// On Windows, this gets called as a global object constructor, before any of our objects are constructed.
|
// On Windows, this gets called as a global object constructor, before any of our objects are constructed.
|
||||||
// So, we have to put it on the stack instead.
|
// So, we have to put it on the stack instead.
|
||||||
cpuinfo_initialize();
|
cpuinfo_initialize();
|
||||||
@@ -231,7 +231,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error)
|
|||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
// Check page size. If it doesn't match, it is a fatal error.
|
// Check page size. If it doesn't match, it is a fatal error.
|
||||||
const size_t runtime_host_page_size = HostSys::GetRuntimePageSize();
|
const size_t runtime_host_page_size = HostSys::GetRuntimePageSize();
|
||||||
if (__pagesize != runtime_host_page_size)
|
if (__pagesize != runtime_host_page_size)
|
||||||
@@ -2608,7 +2608,7 @@ void VMManager::LogCPUCapabilities()
|
|||||||
LogUserPowerPlan();
|
LogUserPowerPlan();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
std::string extensions;
|
std::string extensions;
|
||||||
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX)
|
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX)
|
||||||
extensions += "AVX ";
|
extensions += "AVX ";
|
||||||
@@ -2616,7 +2616,7 @@ void VMManager::LogCPUCapabilities()
|
|||||||
extensions += "AVX2 ";
|
extensions += "AVX2 ";
|
||||||
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX512F)
|
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX512F)
|
||||||
extensions += "AVX512F ";
|
extensions += "AVX512F ";
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
if (cpuinfo_has_arm_neon())
|
if (cpuinfo_has_arm_neon())
|
||||||
extensions += "NEON ";
|
extensions += "NEON ";
|
||||||
#endif
|
#endif
|
||||||
@@ -2628,7 +2628,7 @@ void VMManager::LogCPUCapabilities()
|
|||||||
Console.WriteLn();
|
Console.WriteLn();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef _M_ARM64
|
#ifdef ARCH_ARM64
|
||||||
const size_t runtime_cache_line_size = HostSys::GetRuntimeCacheLineSize();
|
const size_t runtime_cache_line_size = HostSys::GetRuntimeCacheLineSize();
|
||||||
if (__cachelinesize != runtime_cache_line_size)
|
if (__cachelinesize != runtime_cache_line_size)
|
||||||
{
|
{
|
||||||
|
|||||||
+2
-2
@@ -27,9 +27,9 @@ static __fi u32 vu0DenormalizeMicroStatus(u32 nstatus)
|
|||||||
|
|
||||||
static __fi void vu0SetMicroFlags(u32* flags, u32 value)
|
static __fi void vu0SetMicroFlags(u32* flags, u32 value)
|
||||||
{
|
{
|
||||||
#ifdef _M_X86
|
#ifdef ARCH_X86
|
||||||
_mm_store_si128(reinterpret_cast<__m128i*>(flags), _mm_set1_epi32(value));
|
_mm_store_si128(reinterpret_cast<__m128i*>(flags), _mm_set1_epi32(value));
|
||||||
#elif defined(_M_ARM64)
|
#elif defined(ARCH_ARM64)
|
||||||
vst1q_u32(flags, vdupq_n_u32(value));
|
vst1q_u32(flags, vdupq_n_u32(value));
|
||||||
#else
|
#else
|
||||||
flags[0] = flags[1] = flags[2] = flags[3] = value;
|
flags[0] = flags[1] = flags[2] = flags[3] = value;
|
||||||
|
|||||||
@@ -6,7 +6,7 @@ add_pcsx2_test(common_test
|
|||||||
string_util_tests.cpp
|
string_util_tests.cpp
|
||||||
)
|
)
|
||||||
|
|
||||||
if(_M_X86)
|
if(ARCH_X86)
|
||||||
target_sources(common_test PRIVATE
|
target_sources(common_test PRIVATE
|
||||||
x86emitter/codegen_tests.cpp
|
x86emitter/codegen_tests.cpp
|
||||||
x86emitter/codegen_tests.h
|
x86emitter/codegen_tests.h
|
||||||
|
|||||||
@@ -14,7 +14,7 @@ target_link_libraries(core_test PUBLIC
|
|||||||
common
|
common
|
||||||
)
|
)
|
||||||
|
|
||||||
if(DISABLE_ADVANCE_SIMD)
|
if(DISABLE_ADVANCE_SIMD AND ARCH_X86)
|
||||||
if(WIN32)
|
if(WIN32)
|
||||||
set(compile_options_avx2 /arch:AVX2)
|
set(compile_options_avx2 /arch:AVX2)
|
||||||
set(compile_options_avx /arch:AVX)
|
set(compile_options_avx /arch:AVX)
|
||||||
|
|||||||
Reference in New Issue
Block a user