From 81a20150f2b3d32dc25dbe5dfab0fac1af5d000d Mon Sep 17 00:00:00 2001 From: TellowKrinkle Date: Tue, 10 Mar 2026 23:40:32 -0500 Subject: [PATCH] Core: Use ARCH_ARM64 instead of _M_ARM64 fast_float assumes that _M_ARM64 means compiling for Windows --- CMakeLists.txt | 2 +- cmake/BuildParameters.cmake | 13 ++++++++---- cmake/SearchForStuff.cmake | 4 ++-- common/CMakeLists.txt | 2 +- common/Darwin/DarwinMisc.cpp | 20 +++++++++---------- common/Darwin/DarwinThreads.cpp | 4 ++-- common/FPControl.h | 4 ++-- common/FastJmp.cpp | 6 +++--- common/FastJmp.h | 2 +- common/HostSys.cpp | 6 +++--- common/HostSys.h | 4 ++-- common/Linux/LnxHostSys.cpp | 14 ++++++------- common/Linux/LnxThreads.cpp | 4 ++-- common/Pcsx2Defs.h | 12 +++++++++-- common/Perf.cpp | 4 ++-- common/SingleRegisterTypes.h | 4 ++-- common/StringUtil.h | 9 --------- common/VectorIntrin.h | 6 ++++-- common/Windows/WinHostSys.cpp | 6 +++--- common/Windows/WinThreads.cpp | 8 ++++---- pcsx2/CMakeLists.txt | 16 +++++++-------- pcsx2/GS/GSState.cpp | 2 +- pcsx2/GS/GSUtil.cpp | 2 +- pcsx2/GS/GSVector.h | 16 +++++++-------- pcsx2/GS/Renderers/Common/GSVertex.h | 4 ++-- pcsx2/GS/Renderers/DX11/D3D.cpp | 4 ++-- pcsx2/GS/Renderers/SW/GSDrawScanline.h | 4 ++-- pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h | 2 +- pcsx2/Gif_Unit.h | 4 ++-- pcsx2/IPU/IPU_MultiISA.cpp | 4 ++-- pcsx2/IPU/yuv2rgb.cpp | 4 ++-- pcsx2/IPU/yuv2rgb.h | 4 ++-- pcsx2/VMManager.cpp | 10 +++++----- pcsx2/VU0micro.cpp | 4 ++-- tests/ctest/common/CMakeLists.txt | 2 +- tests/ctest/core/CMakeLists.txt | 2 +- 36 files changed, 112 insertions(+), 106 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 0cda49100b..b0c394591c 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -81,7 +81,7 @@ No support will be provided, continue at your own risk. *********************************************************") endif() -if(_M_ARM64) +if(ARCH_ARM64) message(WARNING " *************** UNSUPPORTED CONFIGURATION *************** Apple Silicon support in PCSX2 is INCOMPLETE. There are diff --git a/cmake/BuildParameters.cmake b/cmake/BuildParameters.cmake index 7be3492eaf..56d2a62514 100644 --- a/cmake/BuildParameters.cmake +++ b/cmake/BuildParameters.cmake @@ -84,7 +84,7 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR option(DISABLE_ADVANCE_SIMD "Disable advance use of SIMD (SSE2+ & AVX)" OFF) list(APPEND PCSX2_DEFS _M_X86=1) - set(_M_X86 TRUE) + set(ARCH_X86 TRUE) if(DISABLE_ADVANCE_SIMD) message(STATUS "Building for x86-64 (Multi-ISA).") else() @@ -113,9 +113,14 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "arm64" OR "${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "aarch64" OR "${CMAKE_OSX_ARCHITECTURES}" STREQUAL "arm64") message(STATUS "Building for Apple Silicon (ARM64).") - list(APPEND PCSX2_DEFS _M_ARM64=1) - set(_M_ARM64 TRUE) - add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1") + set(ARCH_ARM64 TRUE) + if(APPLE) + # Min spec is an M1 + add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1") + else() + # Require atomic rmw instructions + add_compile_options("-march=armv8.1-a") + endif() # If we're running on Linux, we need to detect the page/cache line size. # It could be a virtual machine with 4K pages, or 16K with Asahi. diff --git a/cmake/SearchForStuff.cmake b/cmake/SearchForStuff.cmake index be6ebd751e..0f7204ca53 100644 --- a/cmake/SearchForStuff.cmake +++ b/cmake/SearchForStuff.cmake @@ -132,9 +132,9 @@ add_subdirectory(3rdparty/demangler EXCLUDE_FROM_ALL) add_subdirectory(3rdparty/ccc EXCLUDE_FROM_ALL) # Architecture-specific. -if(_M_X86) +if(ARCH_X86) add_subdirectory(3rdparty/zydis EXCLUDE_FROM_ALL) -elseif(_M_ARM64) +elseif(ARCH_ARM64) add_subdirectory(3rdparty/vixl EXCLUDE_FROM_ALL) endif() diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt index e059dd8473..2148f564fa 100644 --- a/common/CMakeLists.txt +++ b/common/CMakeLists.txt @@ -85,7 +85,7 @@ target_sources(common PRIVATE YAML.h ) -if(_M_X86) +if(ARCH_X86) target_sources(common PRIVATE emitter/bmi.cpp emitter/fpu.cpp diff --git a/common/Darwin/DarwinMisc.cpp b/common/Darwin/DarwinMisc.cpp index df2d345717..8e564fc99b 100644 --- a/common/Darwin/DarwinMisc.cpp +++ b/common/Darwin/DarwinMisc.cpp @@ -338,7 +338,7 @@ void* HostSys::Mmap(void* base, size_t size, const PageProtectionMode& mode) if (mode.IsNone()) return nullptr; -#ifdef __aarch64__ +#ifdef ARCH_ARM64 // We can't allocate executable memory with mach_vm_allocate() on Apple Silicon. // Instead, we need to use MAP_JIT with mmap(), which does not support fixed mappings. if (mode.CanExecute()) @@ -441,7 +441,7 @@ void HostSys::UnmapSharedMemory(void* baseaddr, size_t size) pxFailRel("Failed to unmap shared memory"); } -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 void HostSys::FlushInstructionCache(void* address, u32 size) { @@ -518,7 +518,7 @@ bool SharedMemoryMappingArea::Unmap(void* map_base, size_t map_size) return true; } -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 static thread_local int s_code_write_depth = 0; @@ -570,7 +570,7 @@ void HostSys::EndCodeWrite() } } -#endif // _M_ARM64 +#endif // ARCH_ARM64 #define USE_MACH_EXCEPTION_PORTS @@ -589,11 +589,11 @@ namespace PageFaultHandler #ifdef USE_MACH_EXCEPTION_PORTS -#if defined(_M_X86) +#if defined(ARCH_X86) #define THREAD_STATE64_COUNT x86_THREAD_STATE64_COUNT #define THREAD_STATE64 x86_THREAD_STATE64 #define thread_state64_t x86_thread_state64_t -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) #define THREAD_STATE64_COUNT ARM_THREAD_STATE64_COUNT #define THREAD_STATE64 ARM_THREAD_STATE64 #define thread_state64_t arm_thread_state64_t @@ -669,7 +669,7 @@ void PageFaultHandler::SignalHandler(mach_port_t port) { s_in_exception_handler = true; -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 result = HandlePageFault(reinterpret_cast(state->__pc), reinterpret_cast(msg_in.code[1]), (msg_in.code[0] & 2) != 0); #else result = HandlePageFault(reinterpret_cast(state->__rip), reinterpret_cast(msg_in.code[1]), (msg_in.code[0] & 2) != 0); @@ -774,12 +774,12 @@ bool PageFaultHandler::Install(Error* error) void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx) { -#if defined(_M_X86) +#if defined(ARCH_X86) void* const exception_address = reinterpret_cast(static_cast(ctx)->uc_mcontext->__es.__faultvaddr); void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext->__ss.__rip); const bool is_write = (static_cast(ctx)->uc_mcontext->__es.__err & 2) != 0; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) void* const exception_address = reinterpret_cast(static_cast(ctx)->uc_mcontext->__es.__far); void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext->__ss.__pc); const bool is_write = IsStoreInstruction(exception_pc); @@ -825,7 +825,7 @@ bool PageFaultHandler::Install(Error* error) return false; } -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 if (sigaction(SIGSEGV, &sa, nullptr) != 0) { Error::SetErrno(error, "sigaction() for SIGSEGV failed: ", errno); diff --git a/common/Darwin/DarwinThreads.cpp b/common/Darwin/DarwinThreads.cpp index 9f0c78aa4c..731bff609b 100644 --- a/common/Darwin/DarwinThreads.cpp +++ b/common/Darwin/DarwinThreads.cpp @@ -34,9 +34,9 @@ __forceinline void Threading::SpinWait() { // If this doesn't compile you can just comment it out (it only serves as a // performance hint and isn't required). -#if defined(_M_X86) +#if defined(ARCH_X86) __asm__("pause"); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) __asm__ __volatile__("isb"); #endif } diff --git a/common/FPControl.h b/common/FPControl.h index fc282eeaf9..896dc321f2 100644 --- a/common/FPControl.h +++ b/common/FPControl.h @@ -20,7 +20,7 @@ enum class FPRoundMode : u8 struct FPControlRegister { -#ifdef _M_X86 +#ifdef ARCH_X86 u32 bitmask; static constexpr u32 EXCEPTION_MASK = (0x3Fu << 7); @@ -101,7 +101,7 @@ struct FPControlRegister __fi constexpr bool operator==(const FPControlRegister& rhs) const { return bitmask == rhs.bitmask; } __fi constexpr bool operator!=(const FPControlRegister& rhs) const { return bitmask != rhs.bitmask; } -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) u64 bitmask; static constexpr u64 FZ_BIT = (0x1ULL << 24); diff --git a/common/FastJmp.cpp b/common/FastJmp.cpp index 009a300a96..ad329c2bb9 100644 --- a/common/FastJmp.cpp +++ b/common/FastJmp.cpp @@ -4,7 +4,7 @@ #include "FastJmp.h" // Win32 uses Fastjmp.asm, because MSVC doesn't support inline asm. -#if !defined(_WIN32) || defined(_M_ARM64) +#if !defined(_WIN32) || defined(ARCH_ARM64) #if defined(__APPLE__) #define PREFIX "_" @@ -12,7 +12,7 @@ #define PREFIX "" #endif -#if defined(_M_X86) +#if defined(ARCH_X86) asm( "\t.global " PREFIX "fastjmp_set\n" @@ -46,7 +46,7 @@ asm( jmp *%rdx )"); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) asm( "\t.global " PREFIX "fastjmp_set\n" diff --git a/common/FastJmp.h b/common/FastJmp.h index c3749c66b9..cb18335d28 100644 --- a/common/FastJmp.h +++ b/common/FastJmp.h @@ -10,7 +10,7 @@ struct fastjmp_buf { #if defined(_WIN32) static constexpr std::size_t BUF_SIZE = 240; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) static constexpr std::size_t BUF_SIZE = 168; #else static constexpr std::size_t BUF_SIZE = 64; diff --git a/common/HostSys.cpp b/common/HostSys.cpp index ba0105a91c..d1ce25ba9d 100644 --- a/common/HostSys.cpp +++ b/common/HostSys.cpp @@ -13,7 +13,7 @@ static u32 PAUSE_TIME = 0; static void MultiPause() { -#ifdef _M_X86 +#ifdef ARCH_X86 _mm_pause(); _mm_pause(); _mm_pause(); @@ -22,7 +22,7 @@ static void MultiPause() _mm_pause(); _mm_pause(); _mm_pause(); -#elif defined(_M_ARM64) && defined(_MSC_VER) +#elif defined(ARCH_ARM64) && defined(_MSC_VER) __isb(_ARM64_BARRIER_SY); __isb(_ARM64_BARRIER_SY); __isb(_ARM64_BARRIER_SY); @@ -31,7 +31,7 @@ static void MultiPause() __isb(_ARM64_BARRIER_SY); __isb(_ARM64_BARRIER_SY); __isb(_ARM64_BARRIER_SY); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) __asm__ __volatile__("isb"); __asm__ __volatile__("isb"); __asm__ __volatile__("isb"); diff --git a/common/HostSys.h b/common/HostSys.h index 4f91349858..f5eb75df71 100644 --- a/common/HostSys.h +++ b/common/HostSys.h @@ -107,7 +107,7 @@ namespace HostSys extern void UnmapSharedMemory(void* baseaddr, size_t size); /// JIT write protect for Apple Silicon. Needs to be called prior to writing to any RWX pages. -#if !defined(__APPLE__) || !defined(_M_ARM64) +#if !defined(__APPLE__) || !defined(ARCH_ARM64) // clang-format -off [[maybe_unused]] __fi static void BeginCodeWrite() {} [[maybe_unused]] __fi static void EndCodeWrite() {} @@ -119,7 +119,7 @@ namespace HostSys /// Flushes the instruction cache on the host for the specified range. /// Only needed on ARM64, X86 has coherent D/I cache. -#ifdef _M_X86 +#ifdef ARCH_X86 [[maybe_unused]] __fi static void FlushInstructionCache(void* address, u32 size) {} #else void FlushInstructionCache(void* address, u32 size); diff --git a/common/Linux/LnxHostSys.cpp b/common/Linux/LnxHostSys.cpp index e7a3ef477f..31a4abdd99 100644 --- a/common/Linux/LnxHostSys.cpp +++ b/common/Linux/LnxHostSys.cpp @@ -243,7 +243,7 @@ namespace PageFaultHandler static bool s_installed = false; } // namespace PageFaultHandler -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 void HostSys::FlushInstructionCache(void* address, u32 size) { @@ -285,7 +285,7 @@ void HostSys::FlushInstructionCache(void* address, u32 size) } } -#endif // _M_ARM64 +#endif // ARCH_ARM64 namespace PageFaultHandler { @@ -297,21 +297,21 @@ void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx) #if defined(__linux__) void* const exception_address = reinterpret_cast(info->si_addr); -#if defined(_M_X86) +#if defined(ARCH_X86) void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext.gregs[REG_RIP]); const bool is_write = (static_cast(ctx)->uc_mcontext.gregs[REG_ERR] & 2) != 0; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext.pc); const bool is_write = IsStoreInstruction(exception_pc); #endif #elif defined(__FreeBSD__) -#if defined(_M_X86) +#if defined(ARCH_X86) void* const exception_address = reinterpret_cast(static_cast(ctx)->uc_mcontext.mc_addr); void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext.mc_rip); const bool is_write = (static_cast(ctx)->uc_mcontext.mc_err & 2) != 0; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) void* const exception_address = reinterpret_cast(static_cast(ctx)->uc_mcontext->__es.__far); void* const exception_pc = reinterpret_cast(static_cast(ctx)->uc_mcontext->__ss.__pc); const bool is_write = IsStoreInstruction(exception_pc); @@ -358,7 +358,7 @@ bool PageFaultHandler::Install(Error* error) return false; } -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 // We can get SIGBUS on ARM64. if (sigaction(SIGBUS, &sa, nullptr) != 0) { diff --git a/common/Linux/LnxThreads.cpp b/common/Linux/LnxThreads.cpp index 8e7c09c252..11c70daef8 100644 --- a/common/Linux/LnxThreads.cpp +++ b/common/Linux/LnxThreads.cpp @@ -41,9 +41,9 @@ __forceinline void Threading::SpinWait() { // If this doesn't compile you can just comment it out (it only serves as a // performance hint and isn't required). -#if defined(_M_X86) +#if defined(ARCH_X86) __asm__("pause"); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) __asm__ __volatile__("isb"); #endif } diff --git a/common/Pcsx2Defs.h b/common/Pcsx2Defs.h index d34f78b75c..b79ab546e8 100644 --- a/common/Pcsx2Defs.h +++ b/common/Pcsx2Defs.h @@ -23,12 +23,20 @@ static constexpr bool IsDebugBuild = true; static constexpr bool IsDebugBuild = false; #endif +#if defined(_M_ARM64) || defined(__aarch64__) + #define ARCH_ARM64 +#elif defined(_M_X86) || defined(__x86_64__) || defined(__i386__) + #define ARCH_X86 +#else + #error Unsupported Platform +#endif + // Defines the memory page size for the target platform at compilation. #if defined(OVERRIDE_HOST_PAGE_SIZE) static constexpr unsigned int __pagesize = OVERRIDE_HOST_PAGE_SIZE; static constexpr unsigned int __pagemask = __pagesize - 1; static constexpr unsigned int __pageshift = std::bit_width(__pagemask); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) // Apple Silicon uses 16KB pages and 128 byte cache lines. static constexpr unsigned int __pagesize = 0x4000; static constexpr unsigned int __pageshift = 14; @@ -41,7 +49,7 @@ static constexpr bool IsDebugBuild = false; #endif #if defined(OVERRIDE_HOST_CACHE_LINE_SIZE) static constexpr unsigned int __cachelinesize = OVERRIDE_HOST_CACHE_LINE_SIZE; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) static constexpr unsigned int __cachelinesize = 128; #else static constexpr unsigned int __cachelinesize = 64; diff --git a/common/Perf.cpp b/common/Perf.cpp index 3c2e630a8b..dd15011021 100644 --- a/common/Perf.cpp +++ b/common/Perf.cpp @@ -138,9 +138,9 @@ namespace Perf pxAssertRel(perf_marker != MAP_FAILED, "Map perf marker"); JITDUMP_HEADER jh = {}; -#if defined(_M_X86) +#if defined(ARCH_X86) jh.elf_mach = EM_X86_64; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) jh.elf_mach = EM_AARCH64; #else #error Unhandled architecture. diff --git a/common/SingleRegisterTypes.h b/common/SingleRegisterTypes.h index 43a35842f0..d5626157a6 100644 --- a/common/SingleRegisterTypes.h +++ b/common/SingleRegisterTypes.h @@ -15,7 +15,7 @@ #include -#if defined(_M_X86) +#if defined(ARCH_X86) // Can't stick them in structs because it breaks calling convention things, yay using r128 = __m128i; @@ -102,7 +102,7 @@ using r128 = __m128i; _mm_store_ps((float*)&dest, _mm_setzero_ps()); } -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) using r128 = uint32x4_t; diff --git a/common/StringUtil.h b/common/StringUtil.h index ec074db065..4a4f691be1 100644 --- a/common/StringUtil.h +++ b/common/StringUtil.h @@ -14,16 +14,7 @@ #include #include -// Work around us defining _M_ARM64 but fast_float thinking that it means MSVC. -#if defined(_M_ARM64) && !defined(_WIN32) -#define HAD_M_ARM64 _M_ARM64 -#undef _M_ARM64 -#endif #include "fast_float/fast_float.h" -#if defined(HAD_M_ARM64) && !defined(_WIN32) -#define _M_ARM64 HAD_M_ARM64 -#undef HAD_M_ARM64 -#endif // Older versions of libstdc++ are missing support for from_chars() with floats, and was only recently // merged in libc++. So, just fall back to stringstream (yuck!) on everywhere except MSVC. diff --git a/common/VectorIntrin.h b/common/VectorIntrin.h index 04889d3322..9451726b24 100644 --- a/common/VectorIntrin.h +++ b/common/VectorIntrin.h @@ -5,7 +5,9 @@ #pragma once -#if defined(_M_X86) +#include "common/Pcsx2Defs.h" + +#if defined(ARCH_X86) #ifdef _MSC_VER #include @@ -35,7 +37,7 @@ #include #include -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) #include #endif diff --git a/common/Windows/WinHostSys.cpp b/common/Windows/WinHostSys.cpp index 6bf2ffad98..dea7b1aa06 100644 --- a/common/Windows/WinHostSys.cpp +++ b/common/Windows/WinHostSys.cpp @@ -128,7 +128,7 @@ size_t HostSys::GetRuntimeCacheLineSize() return max_line_size; } -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 void HostSys::FlushInstructionCache(void* address, u32 size) { @@ -338,9 +338,9 @@ LONG PageFaultHandler::ExceptionHandler(PEXCEPTION_POINTERS exi) if (exi->ExceptionRecord->ExceptionCode != EXCEPTION_ACCESS_VIOLATION) return EXCEPTION_CONTINUE_SEARCH; -#if defined(_M_X86) +#if defined(ARCH_X86) void* const exception_pc = reinterpret_cast(exi->ContextRecord->Rip); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) void* const exception_pc = reinterpret_cast(exi->ContextRecord->Pc); #else void* const exception_pc = nullptr; diff --git a/common/Windows/WinThreads.cpp b/common/Windows/WinThreads.cpp index b53eea4d5f..edd2ecfbf0 100644 --- a/common/Windows/WinThreads.cpp +++ b/common/Windows/WinThreads.cpp @@ -20,7 +20,7 @@ __fi void Threading::Timeslice() // improve performance and reduce cpu power consumption. __fi void Threading::SpinWait() { -#ifdef _M_X86 +#ifdef ARCH_X86 _mm_pause(); #else YieldProcessor(); @@ -107,7 +107,7 @@ Threading::ThreadHandle& Threading::ThreadHandle::operator=(const ThreadHandle& u64 Threading::ThreadHandle::GetCPUTime() const { -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 u64 ret = 0; if (m_native_handle) QueryThreadCycleTime((HANDLE)m_native_handle, &ret); @@ -208,7 +208,7 @@ Threading::ThreadHandle& Threading::Thread::operator=(Thread&& thread) u64 Threading::GetThreadCpuTime() { -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 u64 ret = 0; QueryThreadCycleTime(GetCurrentThread(), &ret); return ret; @@ -225,7 +225,7 @@ u64 Threading::GetThreadCpuTime() u64 Threading::GetThreadTicksPerSecond() { -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 // On x86, despite what the MS documentation says, this basically appears to be rdtsc. // So, the frequency is our base clock speed (and stable regardless of power management). static u64 frequency = 0; diff --git a/pcsx2/CMakeLists.txt b/pcsx2/CMakeLists.txt index 83121437bc..d639cc5cbe 100644 --- a/pcsx2/CMakeLists.txt +++ b/pcsx2/CMakeLists.txt @@ -470,12 +470,12 @@ set(pcsx2GSSourcesUnshared GS/Renderers/SW/GSRendererSW.cpp ) -if(_M_X86) +if(ARCH_X86) list(APPEND pcsx2GSSourcesUnshared GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.cpp GS/Renderers/SW/GSSetupPrimCodeGenerator.all.cpp ) -elseif(_M_ARM64) +elseif(ARCH_ARM64) list(APPEND pcsx2GSSourcesUnshared GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.cpp GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.cpp @@ -564,14 +564,14 @@ set(pcsx2GSHeaders GS/Renderers/SW/GSVertexSW.h ) -if(_M_X86) +if(ARCH_X86) list(APPEND pcsx2GSHeaders GS/GSVector4.h GS/GSVector4i.h GS/GSVector8.h GS/GSVector8i.h ) -elseif(_M_ARM64) +elseif(ARCH_ARM64) list(APPEND pcsx2GSHeaders GS/GSVector4_arm64.h GS/GSVector4i_arm64.h @@ -746,7 +746,7 @@ set(pcsx2IPUHeaders IPU/yuv2rgb.h ) -if(DISABLE_ADVANCE_SIMD) +if(DISABLE_ADVANCE_SIMD AND ARCH_X86) target_compile_definitions(PCSX2 PUBLIC MULTI_ISA_SHARED_COMPILATION) if(USE_GCC) target_link_options(PCSX2_FLAGS INTERFACE -Wno-odr) @@ -1071,10 +1071,10 @@ set(pcsx2LTOSources ${pcsx2GSHeaders} ) -if(_M_X86) +if(ARCH_X86) list(APPEND pcsx2LTOSources ${pcsx2x86Sources} ${pcsx2x86Headers}) target_link_libraries(PCSX2_FLAGS INTERFACE zydis) -elseif(_M_ARM64) +elseif(ARCH_ARM64) list(APPEND pcsx2LTOSources ${pcsx2arm64Sources} ${pcsx2arm64Headers}) target_link_libraries(PCSX2_FLAGS INTERFACE vixl) endif() @@ -1202,7 +1202,7 @@ else() endif() # additonal include directories -if(_M_X86) +if(ARCH_X86) target_include_directories(PCSX2_FLAGS INTERFACE "${CMAKE_SOURCE_DIR}/3rdparty/xbyak") target_compile_definitions(PCSX2_FLAGS INTERFACE XBYAK_NO_EXCEPTION) endif() diff --git a/pcsx2/GS/GSState.cpp b/pcsx2/GS/GSState.cpp index 55f9876497..0e2d424420 100644 --- a/pcsx2/GS/GSState.cpp +++ b/pcsx2/GS/GSState.cpp @@ -5117,7 +5117,7 @@ __forceinline void GSState::VertexKick(u32 skip) break; } -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 // We only care about the xy passing the skip test. zw is the offset coordinates for native culling. skip |= test.mask() & 0xff; #else diff --git a/pcsx2/GS/GSUtil.cpp b/pcsx2/GS/GSUtil.cpp index 698b52de8c..85be5b0836 100644 --- a/pcsx2/GS/GSUtil.cpp +++ b/pcsx2/GS/GSUtil.cpp @@ -282,7 +282,7 @@ GSRendererType GSUtil::GetPreferredRenderer() #if defined(__APPLE__) // Mac: Prefer Metal hardware. preferred_renderer = GSRendererType::Metal; -#elif defined(_WIN32) && defined(_M_ARM64) +#elif defined(_WIN32) && defined(ARCH_ARM64) // Default to DX12 on Windows-on-ARM. preferred_renderer = GSRendererType::DX12; #elif defined(_WIN32) diff --git a/pcsx2/GS/GSVector.h b/pcsx2/GS/GSVector.h index 5d72e94ab2..43ff67552c 100644 --- a/pcsx2/GS/GSVector.h +++ b/pcsx2/GS/GSVector.h @@ -84,7 +84,7 @@ typedef GSVector2T GSVector2i; class GSVector4; class GSVector4i; -#if defined(_M_X86) +#if defined(ARCH_X86) #if _M_SSE >= 0x500 class GSVector8; @@ -103,7 +103,7 @@ class GSVector8i; #include "GSVector8i.h" #include "GSVector8.h" -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) #include "GSVector4i_arm64.h" #include "GSVector4_arm64.h" #endif @@ -112,9 +112,9 @@ class GSVector8i; __forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate) { -#if defined(_M_X86) +#if defined(ARCH_X86) m = truncate ? _mm_cvttps_epi32(v) : _mm_cvtps_epi32(v); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) // GS thread uses default (nearest) rounding. v4s = truncate ? vcvtq_s32_f32(v.v4s) : vcvtnq_u32_f32(v.v4s); #endif @@ -122,9 +122,9 @@ __forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate) __forceinline_odr GSVector4::GSVector4(const GSVector4i& v) { -#if defined(_M_X86) +#if defined(ARCH_X86) m = _mm_cvtepi32_ps(v); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) v4s = vcvtq_f32_s32(v.v4s); #endif } @@ -168,7 +168,7 @@ __forceinline_odr void GSVector8i::sw32_inv(GSVector8i& a, GSVector8i& b) __forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v) { -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 return GSVector4i(_mm_castps_si128(v.m)); #else return GSVector4i(vreinterpretq_s32_f32(v.v4s)); @@ -177,7 +177,7 @@ __forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v) __forceinline_odr GSVector4 GSVector4::cast(const GSVector4i& v) { -#ifndef _M_ARM64 +#ifndef ARCH_ARM64 return GSVector4(_mm_castsi128_ps(v.m)); #else return GSVector4(vreinterpretq_f32_s32(v.v4s)); diff --git a/pcsx2/GS/Renderers/Common/GSVertex.h b/pcsx2/GS/Renderers/Common/GSVertex.h index 87abb73071..eb82b71b12 100644 --- a/pcsx2/GS/Renderers/Common/GSVertex.h +++ b/pcsx2/GS/Renderers/Common/GSVertex.h @@ -21,12 +21,12 @@ struct alignas(32) GSVertex u32 FOG; // FOG:28 }; -#if defined(_M_X86) +#if defined(ARCH_X86) #if _M_SSE >= 0x500 __m256i mx; #endif __m128i m[2]; -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) int32x4_t m[2]; #endif }; diff --git a/pcsx2/GS/Renderers/DX11/D3D.cpp b/pcsx2/GS/Renderers/DX11/D3D.cpp index 24082cd949..9181ec6433 100644 --- a/pcsx2/GS/Renderers/DX11/D3D.cpp +++ b/pcsx2/GS/Renderers/DX11/D3D.cpp @@ -7,7 +7,7 @@ #include "GS/GSExtra.h" #include "Host.h" -#ifdef _M_X86 +#ifdef ARCH_X86 #include "GS/Renderers/Vulkan/GSDeviceVK.h" #endif @@ -457,7 +457,7 @@ GSRendererType D3D::GetPreferredRenderer() default: { // Default is D3D11, but prefer DX12 on ARM (better drivers). -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 return GSRendererType::DX12; #else return GSRendererType::DX11; diff --git a/pcsx2/GS/Renderers/SW/GSDrawScanline.h b/pcsx2/GS/Renderers/SW/GSDrawScanline.h index 9ef7d28889..48612d39a7 100644 --- a/pcsx2/GS/Renderers/SW/GSDrawScanline.h +++ b/pcsx2/GS/Renderers/SW/GSDrawScanline.h @@ -5,11 +5,11 @@ #include "GS/GSState.h" -#ifdef _M_X86 +#ifdef ARCH_X86 #include "GS/Renderers/SW/GSSetupPrimCodeGenerator.all.h" #include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.h" #endif -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 #include "GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.h" #include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.h" #endif diff --git a/pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h b/pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h index 6fd816e251..ecada5d809 100644 --- a/pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h +++ b/pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h @@ -157,7 +157,7 @@ struct alignas(32) GSScanlineGlobalData // per batch variables, this is like a p #endif -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 // Mini version of constant data for ARM64, we don't need all of it alignas(16) u32 const_test_128b[8][4] = { {0x00000000, 0x00000000, 0x00000000, 0x00000000}, diff --git a/pcsx2/Gif_Unit.h b/pcsx2/Gif_Unit.h index f686d4e7d7..e41300cdfe 100644 --- a/pcsx2/Gif_Unit.h +++ b/pcsx2/Gif_Unit.h @@ -105,7 +105,7 @@ struct Gif_Tag __ri void analyzeTag() { -#ifdef _M_X86 +#ifdef ARCH_X86 // zero out bits for registers which shouldn't be tested __m128i vregs = _mm_loadl_epi64(reinterpret_cast(tag.REGS)); vregs = _mm_and_si128(vregs, _mm_srli_epi64(_mm_set1_epi32(0xFFFFFFFFu), (64 - nRegs * 4))); @@ -118,7 +118,7 @@ struct Gif_Tag // write out unpacked registers _mm_storeu_si128(reinterpret_cast<__m128i*>(regs), vregs); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) // zero out bits for registers which shouldn't be tested u64 REGS64; std::memcpy(®S64, tag.REGS, sizeof(u64)); diff --git a/pcsx2/IPU/IPU_MultiISA.cpp b/pcsx2/IPU/IPU_MultiISA.cpp index 87d5f8b05c..7398b23e82 100644 --- a/pcsx2/IPU/IPU_MultiISA.cpp +++ b/pcsx2/IPU/IPU_MultiISA.cpp @@ -1374,7 +1374,7 @@ __fi static bool mpeg2_slice() //Cr bias - 8 * 8 //Cb bias - 8 * 8 -#if defined(_M_X86) +#if defined(ARCH_X86) __m128i zeroreg = _mm_setzero_si128(); for (uint i = 0; i < (256+64+64) / 32; ++i) @@ -1389,7 +1389,7 @@ __fi static bool mpeg2_slice() s += 32; d += 32; } -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) uint8x16_t zeroreg = vmovq_n_u8(0); for (uint i = 0; i < (256 + 64 + 64) / 32; ++i) diff --git a/pcsx2/IPU/yuv2rgb.cpp b/pcsx2/IPU/yuv2rgb.cpp index 9dda6c73a5..c8503c6c95 100644 --- a/pcsx2/IPU/yuv2rgb.cpp +++ b/pcsx2/IPU/yuv2rgb.cpp @@ -42,7 +42,7 @@ void yuv2rgb_reference(void) } } -#if defined(_M_X86) +#if defined(ARCH_X86) // Suikoden Tactics FMV speed results: Reference - ~72fps, SSE2 - ~120fps // An AVX2 version is only slightly faster than an SSE2 version (+2-3fps) @@ -136,7 +136,7 @@ __ri void yuv2rgb_sse2() } } -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) #if defined(_MSC_VER) && !defined(__clang__) #include diff --git a/pcsx2/IPU/yuv2rgb.h b/pcsx2/IPU/yuv2rgb.h index 0aca0ab0f5..0272b6264b 100644 --- a/pcsx2/IPU/yuv2rgb.h +++ b/pcsx2/IPU/yuv2rgb.h @@ -7,12 +7,12 @@ MULTI_ISA_DEF(extern void yuv2rgb_reference();) -#if defined(_M_X86) +#if defined(ARCH_X86) #define yuv2rgb yuv2rgb_sse2 MULTI_ISA_DEF(extern void yuv2rgb_sse2();) -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) #define yuv2rgb yuv2rgb_neon MULTI_ISA_DEF(extern void yuv2rgb_neon();) diff --git a/pcsx2/VMManager.cpp b/pcsx2/VMManager.cpp index f491c4322e..5516807463 100644 --- a/pcsx2/VMManager.cpp +++ b/pcsx2/VMManager.cpp @@ -207,7 +207,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error) { #define COMMON_DOWNLOAD_MESSAGE "PCSX2 builds can be downloaded from https://pcsx2.net/downloads/" -#if defined(_M_X86) +#if defined(ARCH_X86) // On Windows, this gets called as a global object constructor, before any of our objects are constructed. // So, we have to put it on the stack instead. cpuinfo_initialize(); @@ -231,7 +231,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error) return false; } #endif -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) // Check page size. If it doesn't match, it is a fatal error. const size_t runtime_host_page_size = HostSys::GetRuntimePageSize(); if (__pagesize != runtime_host_page_size) @@ -2608,7 +2608,7 @@ void VMManager::LogCPUCapabilities() LogUserPowerPlan(); #endif -#ifdef _M_X86 +#ifdef ARCH_X86 std::string extensions; if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX) extensions += "AVX "; @@ -2616,7 +2616,7 @@ void VMManager::LogCPUCapabilities() extensions += "AVX2 "; if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX512F) extensions += "AVX512F "; -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 if (cpuinfo_has_arm_neon()) extensions += "NEON "; #endif @@ -2628,7 +2628,7 @@ void VMManager::LogCPUCapabilities() Console.WriteLn(); #endif -#ifdef _M_ARM64 +#ifdef ARCH_ARM64 const size_t runtime_cache_line_size = HostSys::GetRuntimeCacheLineSize(); if (__cachelinesize != runtime_cache_line_size) { diff --git a/pcsx2/VU0micro.cpp b/pcsx2/VU0micro.cpp index 16dc24e28d..1e2081d4cf 100644 --- a/pcsx2/VU0micro.cpp +++ b/pcsx2/VU0micro.cpp @@ -27,9 +27,9 @@ static __fi u32 vu0DenormalizeMicroStatus(u32 nstatus) static __fi void vu0SetMicroFlags(u32* flags, u32 value) { -#ifdef _M_X86 +#ifdef ARCH_X86 _mm_store_si128(reinterpret_cast<__m128i*>(flags), _mm_set1_epi32(value)); -#elif defined(_M_ARM64) +#elif defined(ARCH_ARM64) vst1q_u32(flags, vdupq_n_u32(value)); #else flags[0] = flags[1] = flags[2] = flags[3] = value; diff --git a/tests/ctest/common/CMakeLists.txt b/tests/ctest/common/CMakeLists.txt index b4aefd4625..00a0ce0711 100644 --- a/tests/ctest/common/CMakeLists.txt +++ b/tests/ctest/common/CMakeLists.txt @@ -6,7 +6,7 @@ add_pcsx2_test(common_test string_util_tests.cpp ) -if(_M_X86) +if(ARCH_X86) target_sources(common_test PRIVATE x86emitter/codegen_tests.cpp x86emitter/codegen_tests.h diff --git a/tests/ctest/core/CMakeLists.txt b/tests/ctest/core/CMakeLists.txt index 1b65e11f96..da86fe3dcd 100644 --- a/tests/ctest/core/CMakeLists.txt +++ b/tests/ctest/core/CMakeLists.txt @@ -14,7 +14,7 @@ target_link_libraries(core_test PUBLIC common ) -if(DISABLE_ADVANCE_SIMD) +if(DISABLE_ADVANCE_SIMD AND ARCH_X86) if(WIN32) set(compile_options_avx2 /arch:AVX2) set(compile_options_avx /arch:AVX)