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Core: Use ARCH_ARM64 instead of _M_ARM64

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fast_float assumes that _M_ARM64 means compiling for Windows
This commit is contained in:
TellowKrinkle
2026-03-10 23:40:32 -05:00
committed by Ty
parent 5e5ea642b0
commit 81a20150f2
36 changed files with 112 additions and 106 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CMakeLists.txt
+1 -1
View File
@@ -81,7 +81,7 @@ No support will be provided, continue at your own risk.
*********************************************************")
endif()
if(_M_ARM64)
if(ARCH_ARM64)
message(WARNING "
*************** UNSUPPORTED CONFIGURATION ***************
Apple Silicon support in PCSX2 is INCOMPLETE. There are
cmake/BuildParameters.cmake
+9 -4
View File
@@ -84,7 +84,7 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR
option(DISABLE_ADVANCE_SIMD "Disable advance use of SIMD (SSE2+ & AVX)" OFF)
list(APPEND PCSX2_DEFS _M_X86=1)
set(_M_X86 TRUE)
set(ARCH_X86 TRUE)
if(DISABLE_ADVANCE_SIMD)
message(STATUS "Building for x86-64 (Multi-ISA).")
else()
@@ -113,9 +113,14 @@ if("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "x86_64" OR "${CMAKE_HOST_SYSTEM_PR
elseif("${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "arm64" OR "${CMAKE_HOST_SYSTEM_PROCESSOR}" STREQUAL "aarch64" OR
"${CMAKE_OSX_ARCHITECTURES}" STREQUAL "arm64")
message(STATUS "Building for Apple Silicon (ARM64).")
list(APPEND PCSX2_DEFS _M_ARM64=1)
set(_M_ARM64 TRUE)
add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1")
set(ARCH_ARM64 TRUE)
if(APPLE)
# Min spec is an M1
add_compile_options("-march=armv8.4-a" "-mcpu=apple-m1")
else()
# Require atomic rmw instructions
add_compile_options("-march=armv8.1-a")
endif()
# If we're running on Linux, we need to detect the page/cache line size.
# It could be a virtual machine with 4K pages, or 16K with Asahi.
cmake/SearchForStuff.cmake
+2 -2
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@@ -132,9 +132,9 @@ add_subdirectory(3rdparty/demangler EXCLUDE_FROM_ALL)
add_subdirectory(3rdparty/ccc EXCLUDE_FROM_ALL)
# Architecture-specific.
if(_M_X86)
if(ARCH_X86)
add_subdirectory(3rdparty/zydis EXCLUDE_FROM_ALL)
elseif(_M_ARM64)
elseif(ARCH_ARM64)
add_subdirectory(3rdparty/vixl EXCLUDE_FROM_ALL)
endif()
common/CMakeLists.txt
+1 -1
View File
@@ -85,7 +85,7 @@ target_sources(common PRIVATE
YAML.h
)
if(_M_X86)
if(ARCH_X86)
target_sources(common PRIVATE
emitter/bmi.cpp
emitter/fpu.cpp
common/Darwin/DarwinMisc.cpp
+10 -10
View File
@@ -338,7 +338,7 @@ void* HostSys::Mmap(void* base, size_t size, const PageProtectionMode& mode)
if (mode.IsNone())
return nullptr;
#ifdef __aarch64__
#ifdef ARCH_ARM64
// We can't allocate executable memory with mach_vm_allocate() on Apple Silicon.
// Instead, we need to use MAP_JIT with mmap(), which does not support fixed mappings.
if (mode.CanExecute())
@@ -441,7 +441,7 @@ void HostSys::UnmapSharedMemory(void* baseaddr, size_t size)
pxFailRel("Failed to unmap shared memory");
}
#ifdef _M_ARM64
#ifdef ARCH_ARM64
void HostSys::FlushInstructionCache(void* address, u32 size)
{
@@ -518,7 +518,7 @@ bool SharedMemoryMappingArea::Unmap(void* map_base, size_t map_size)
return true;
}
#ifdef _M_ARM64
#ifdef ARCH_ARM64
static thread_local int s_code_write_depth = 0;
@@ -570,7 +570,7 @@ void HostSys::EndCodeWrite()
}
}
#endif // _M_ARM64
#endif // ARCH_ARM64
#define USE_MACH_EXCEPTION_PORTS
@@ -589,11 +589,11 @@ namespace PageFaultHandler
#ifdef USE_MACH_EXCEPTION_PORTS
#if defined(_M_X86)
#if defined(ARCH_X86)
#define THREAD_STATE64_COUNT x86_THREAD_STATE64_COUNT
#define THREAD_STATE64 x86_THREAD_STATE64
#define thread_state64_t x86_thread_state64_t
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
#define THREAD_STATE64_COUNT ARM_THREAD_STATE64_COUNT
#define THREAD_STATE64 ARM_THREAD_STATE64
#define thread_state64_t arm_thread_state64_t
@@ -669,7 +669,7 @@ void PageFaultHandler::SignalHandler(mach_port_t port)
{
s_in_exception_handler = true;
#ifdef _M_ARM64
#ifdef ARCH_ARM64
result = HandlePageFault(reinterpret_cast<void*>(state->__pc), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
#else
result = HandlePageFault(reinterpret_cast<void*>(state->__rip), reinterpret_cast<void*>(msg_in.code[1]), (msg_in.code[0] & 2) != 0);
@@ -774,12 +774,12 @@ bool PageFaultHandler::Install(Error* error)
void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx)
{
#if defined(_M_X86)
#if defined(ARCH_X86)
void* const exception_address =
reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__faultvaddr);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__rip);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__err & 2) != 0;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
const bool is_write = IsStoreInstruction(exception_pc);
@@ -825,7 +825,7 @@ bool PageFaultHandler::Install(Error* error)
return false;
}
#ifdef _M_ARM64
#ifdef ARCH_ARM64
if (sigaction(SIGSEGV, &sa, nullptr) != 0)
{
Error::SetErrno(error, "sigaction() for SIGSEGV failed: ", errno);
common/Darwin/DarwinThreads.cpp
+2 -2
View File
@@ -34,9 +34,9 @@ __forceinline void Threading::SpinWait()
{
// If this doesn't compile you can just comment it out (it only serves as a
// performance hint and isn't required).
#if defined(_M_X86)
#if defined(ARCH_X86)
__asm__("pause");
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
__asm__ __volatile__("isb");
#endif
}
common/FPControl.h
+2 -2
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@@ -20,7 +20,7 @@ enum class FPRoundMode : u8
struct FPControlRegister
{
#ifdef _M_X86
#ifdef ARCH_X86
u32 bitmask;
static constexpr u32 EXCEPTION_MASK = (0x3Fu << 7);
@@ -101,7 +101,7 @@ struct FPControlRegister
__fi constexpr bool operator==(const FPControlRegister& rhs) const { return bitmask == rhs.bitmask; }
__fi constexpr bool operator!=(const FPControlRegister& rhs) const { return bitmask != rhs.bitmask; }
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
u64 bitmask;
static constexpr u64 FZ_BIT = (0x1ULL << 24);
common/FastJmp.cpp
+3 -3
View File
@@ -4,7 +4,7 @@
#include "FastJmp.h"
// Win32 uses Fastjmp.asm, because MSVC doesn't support inline asm.
#if !defined(_WIN32) || defined(_M_ARM64)
#if !defined(_WIN32) || defined(ARCH_ARM64)
#if defined(__APPLE__)
#define PREFIX "_"
@@ -12,7 +12,7 @@
#define PREFIX ""
#endif
#if defined(_M_X86)
#if defined(ARCH_X86)
asm(
"\t.global " PREFIX "fastjmp_set\n"
@@ -46,7 +46,7 @@ asm(
jmp *%rdx
)");
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
asm(
"\t.global " PREFIX "fastjmp_set\n"
common/FastJmp.h
+1 -1
View File
@@ -10,7 +10,7 @@ struct fastjmp_buf
{
#if defined(_WIN32)
static constexpr std::size_t BUF_SIZE = 240;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
static constexpr std::size_t BUF_SIZE = 168;
#else
static constexpr std::size_t BUF_SIZE = 64;
common/HostSys.cpp
+3 -3
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@@ -13,7 +13,7 @@ static u32 PAUSE_TIME = 0;
static void MultiPause()
{
#ifdef _M_X86
#ifdef ARCH_X86
_mm_pause();
_mm_pause();
_mm_pause();
@@ -22,7 +22,7 @@ static void MultiPause()
_mm_pause();
_mm_pause();
_mm_pause();
#elif defined(_M_ARM64) && defined(_MSC_VER)
#elif defined(ARCH_ARM64) && defined(_MSC_VER)
__isb(_ARM64_BARRIER_SY);
__isb(_ARM64_BARRIER_SY);
__isb(_ARM64_BARRIER_SY);
@@ -31,7 +31,7 @@ static void MultiPause()
__isb(_ARM64_BARRIER_SY);
__isb(_ARM64_BARRIER_SY);
__isb(_ARM64_BARRIER_SY);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
__asm__ __volatile__("isb");
__asm__ __volatile__("isb");
__asm__ __volatile__("isb");
common/HostSys.h
+2 -2
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@@ -107,7 +107,7 @@ namespace HostSys
extern void UnmapSharedMemory(void* baseaddr, size_t size);
/// JIT write protect for Apple Silicon. Needs to be called prior to writing to any RWX pages.
#if !defined(__APPLE__) || !defined(_M_ARM64)
#if !defined(__APPLE__) || !defined(ARCH_ARM64)
// clang-format -off
[[maybe_unused]] __fi static void BeginCodeWrite() {}
[[maybe_unused]] __fi static void EndCodeWrite() {}
@@ -119,7 +119,7 @@ namespace HostSys
/// Flushes the instruction cache on the host for the specified range.
/// Only needed on ARM64, X86 has coherent D/I cache.
#ifdef _M_X86
#ifdef ARCH_X86
[[maybe_unused]] __fi static void FlushInstructionCache(void* address, u32 size) {}
#else
void FlushInstructionCache(void* address, u32 size);
common/Linux/LnxHostSys.cpp
+7 -7
View File
@@ -243,7 +243,7 @@ namespace PageFaultHandler
static bool s_installed = false;
} // namespace PageFaultHandler
#ifdef _M_ARM64
#ifdef ARCH_ARM64
void HostSys::FlushInstructionCache(void* address, u32 size)
{
@@ -285,7 +285,7 @@ void HostSys::FlushInstructionCache(void* address, u32 size)
}
}
#endif // _M_ARM64
#endif // ARCH_ARM64
namespace PageFaultHandler
{
@@ -297,21 +297,21 @@ void PageFaultHandler::SignalHandler(int sig, siginfo_t* info, void* ctx)
#if defined(__linux__)
void* const exception_address = reinterpret_cast<void*>(info->si_addr);
#if defined(_M_X86)
#if defined(ARCH_X86)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_RIP]);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_ERR] & 2) != 0;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.pc);
const bool is_write = IsStoreInstruction(exception_pc);
#endif
#elif defined(__FreeBSD__)
#if defined(_M_X86)
#if defined(ARCH_X86)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_addr);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_rip);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_err & 2) != 0;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
const bool is_write = IsStoreInstruction(exception_pc);
@@ -358,7 +358,7 @@ bool PageFaultHandler::Install(Error* error)
return false;
}
#ifdef _M_ARM64
#ifdef ARCH_ARM64
// We can get SIGBUS on ARM64.
if (sigaction(SIGBUS, &sa, nullptr) != 0)
{
common/Linux/LnxThreads.cpp
+2 -2
View File
@@ -41,9 +41,9 @@ __forceinline void Threading::SpinWait()
{
// If this doesn't compile you can just comment it out (it only serves as a
// performance hint and isn't required).
#if defined(_M_X86)
#if defined(ARCH_X86)
__asm__("pause");
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
__asm__ __volatile__("isb");
#endif
}
common/Pcsx2Defs.h
+10 -2
View File
@@ -23,12 +23,20 @@ static constexpr bool IsDebugBuild = true;
static constexpr bool IsDebugBuild = false;
#endif
#if defined(_M_ARM64) || defined(__aarch64__)
#define ARCH_ARM64
#elif defined(_M_X86) || defined(__x86_64__) || defined(__i386__)
#define ARCH_X86
#else
#error Unsupported Platform
#endif
// Defines the memory page size for the target platform at compilation.
#if defined(OVERRIDE_HOST_PAGE_SIZE)
static constexpr unsigned int __pagesize = OVERRIDE_HOST_PAGE_SIZE;
static constexpr unsigned int __pagemask = __pagesize - 1;
static constexpr unsigned int __pageshift = std::bit_width(__pagemask);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
// Apple Silicon uses 16KB pages and 128 byte cache lines.
static constexpr unsigned int __pagesize = 0x4000;
static constexpr unsigned int __pageshift = 14;
@@ -41,7 +49,7 @@ static constexpr bool IsDebugBuild = false;
#endif
#if defined(OVERRIDE_HOST_CACHE_LINE_SIZE)
static constexpr unsigned int __cachelinesize = OVERRIDE_HOST_CACHE_LINE_SIZE;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
static constexpr unsigned int __cachelinesize = 128;
#else
static constexpr unsigned int __cachelinesize = 64;
common/Perf.cpp
+2 -2
View File
@@ -138,9 +138,9 @@ namespace Perf
pxAssertRel(perf_marker != MAP_FAILED, "Map perf marker");
JITDUMP_HEADER jh = {};
#if defined(_M_X86)
#if defined(ARCH_X86)
jh.elf_mach = EM_X86_64;
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
jh.elf_mach = EM_AARCH64;
#else
#error Unhandled architecture.
common/SingleRegisterTypes.h
+2 -2
View File
@@ -15,7 +15,7 @@
#include <cstring>
#if defined(_M_X86)
#if defined(ARCH_X86)
// Can't stick them in structs because it breaks calling convention things, yay
using r128 = __m128i;
@@ -102,7 +102,7 @@ using r128 = __m128i;
_mm_store_ps((float*)&dest, _mm_setzero_ps());
}
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
using r128 = uint32x4_t;
common/StringUtil.h
-9
View File
@@ -14,16 +14,7 @@
#include <string_view>
#include <vector>
// Work around us defining _M_ARM64 but fast_float thinking that it means MSVC.
#if defined(_M_ARM64) && !defined(_WIN32)
#define HAD_M_ARM64 _M_ARM64
#undef _M_ARM64
#endif
#include "fast_float/fast_float.h"
#if defined(HAD_M_ARM64) && !defined(_WIN32)
#define _M_ARM64 HAD_M_ARM64
#undef HAD_M_ARM64
#endif
// Older versions of libstdc++ are missing support for from_chars() with floats, and was only recently
// merged in libc++. So, just fall back to stringstream (yuck!) on everywhere except MSVC.
common/VectorIntrin.h
+4 -2
View File
@@ -5,7 +5,9 @@
#pragma once
#if defined(_M_X86)
#include "common/Pcsx2Defs.h"
#if defined(ARCH_X86)
#ifdef _MSC_VER
#include <intrin.h>
@@ -35,7 +37,7 @@
#include <smmintrin.h>
#include <immintrin.h>
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
#include <arm_neon.h>
#endif
common/Windows/WinHostSys.cpp
+3 -3
View File
@@ -128,7 +128,7 @@ size_t HostSys::GetRuntimeCacheLineSize()
return max_line_size;
}
#ifdef _M_ARM64
#ifdef ARCH_ARM64
void HostSys::FlushInstructionCache(void* address, u32 size)
{
@@ -338,9 +338,9 @@ LONG PageFaultHandler::ExceptionHandler(PEXCEPTION_POINTERS exi)
if (exi->ExceptionRecord->ExceptionCode != EXCEPTION_ACCESS_VIOLATION)
return EXCEPTION_CONTINUE_SEARCH;
#if defined(_M_X86)
#if defined(ARCH_X86)
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Rip);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
void* const exception_pc = reinterpret_cast<void*>(exi->ContextRecord->Pc);
#else
void* const exception_pc = nullptr;
common/Windows/WinThreads.cpp
+4 -4
View File
@@ -20,7 +20,7 @@ __fi void Threading::Timeslice()
// improve performance and reduce cpu power consumption.
__fi void Threading::SpinWait()
{
#ifdef _M_X86
#ifdef ARCH_X86
_mm_pause();
#else
YieldProcessor();
@@ -107,7 +107,7 @@ Threading::ThreadHandle& Threading::ThreadHandle::operator=(const ThreadHandle&
u64 Threading::ThreadHandle::GetCPUTime() const
{
#ifndef _M_ARM64
#ifndef ARCH_ARM64
u64 ret = 0;
if (m_native_handle)
QueryThreadCycleTime((HANDLE)m_native_handle, &ret);
@@ -208,7 +208,7 @@ Threading::ThreadHandle& Threading::Thread::operator=(Thread&& thread)
u64 Threading::GetThreadCpuTime()
{
#ifndef _M_ARM64
#ifndef ARCH_ARM64
u64 ret = 0;
QueryThreadCycleTime(GetCurrentThread(), &ret);
return ret;
@@ -225,7 +225,7 @@ u64 Threading::GetThreadCpuTime()
u64 Threading::GetThreadTicksPerSecond()
{
#ifndef _M_ARM64
#ifndef ARCH_ARM64
// On x86, despite what the MS documentation says, this basically appears to be rdtsc.
// So, the frequency is our base clock speed (and stable regardless of power management).
static u64 frequency = 0;
pcsx2/CMakeLists.txt
+8 -8
View File
@@ -470,12 +470,12 @@ set(pcsx2GSSourcesUnshared
GS/Renderers/SW/GSRendererSW.cpp
)
if(_M_X86)
if(ARCH_X86)
list(APPEND pcsx2GSSourcesUnshared
GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.cpp
GS/Renderers/SW/GSSetupPrimCodeGenerator.all.cpp
)
elseif(_M_ARM64)
elseif(ARCH_ARM64)
list(APPEND pcsx2GSSourcesUnshared
GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.cpp
GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.cpp
@@ -564,14 +564,14 @@ set(pcsx2GSHeaders
GS/Renderers/SW/GSVertexSW.h
)
if(_M_X86)
if(ARCH_X86)
list(APPEND pcsx2GSHeaders
GS/GSVector4.h
GS/GSVector4i.h
GS/GSVector8.h
GS/GSVector8i.h
)
elseif(_M_ARM64)
elseif(ARCH_ARM64)
list(APPEND pcsx2GSHeaders
GS/GSVector4_arm64.h
GS/GSVector4i_arm64.h
@@ -746,7 +746,7 @@ set(pcsx2IPUHeaders
IPU/yuv2rgb.h
)
if(DISABLE_ADVANCE_SIMD)
if(DISABLE_ADVANCE_SIMD AND ARCH_X86)
target_compile_definitions(PCSX2 PUBLIC MULTI_ISA_SHARED_COMPILATION)
if(USE_GCC)
target_link_options(PCSX2_FLAGS INTERFACE -Wno-odr)
@@ -1071,10 +1071,10 @@ set(pcsx2LTOSources
${pcsx2GSHeaders}
)
if(_M_X86)
if(ARCH_X86)
list(APPEND pcsx2LTOSources ${pcsx2x86Sources} ${pcsx2x86Headers})
target_link_libraries(PCSX2_FLAGS INTERFACE zydis)
elseif(_M_ARM64)
elseif(ARCH_ARM64)
list(APPEND pcsx2LTOSources ${pcsx2arm64Sources} ${pcsx2arm64Headers})
target_link_libraries(PCSX2_FLAGS INTERFACE vixl)
endif()
@@ -1202,7 +1202,7 @@ else()
endif()
# additonal include directories
if(_M_X86)
if(ARCH_X86)
target_include_directories(PCSX2_FLAGS INTERFACE "${CMAKE_SOURCE_DIR}/3rdparty/xbyak")
target_compile_definitions(PCSX2_FLAGS INTERFACE XBYAK_NO_EXCEPTION)
endif()
pcsx2/GS/GSState.cpp
+1 -1
View File
@@ -5117,7 +5117,7 @@ __forceinline void GSState::VertexKick(u32 skip)
break;
}
#ifndef _M_ARM64
#ifndef ARCH_ARM64
// We only care about the xy passing the skip test. zw is the offset coordinates for native culling.
skip |= test.mask() & 0xff;
#else
pcsx2/GS/GSUtil.cpp
+1 -1
View File
@@ -282,7 +282,7 @@ GSRendererType GSUtil::GetPreferredRenderer()
#if defined(__APPLE__)
// Mac: Prefer Metal hardware.
preferred_renderer = GSRendererType::Metal;
#elif defined(_WIN32) && defined(_M_ARM64)
#elif defined(_WIN32) && defined(ARCH_ARM64)
// Default to DX12 on Windows-on-ARM.
preferred_renderer = GSRendererType::DX12;
#elif defined(_WIN32)
pcsx2/GS/GSVector.h
+8 -8
View File
@@ -84,7 +84,7 @@ typedef GSVector2T<int> GSVector2i;
class GSVector4;
class GSVector4i;
#if defined(_M_X86)
#if defined(ARCH_X86)
#if _M_SSE >= 0x500
class GSVector8;
@@ -103,7 +103,7 @@ class GSVector8i;
#include "GSVector8i.h"
#include "GSVector8.h"
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
#include "GSVector4i_arm64.h"
#include "GSVector4_arm64.h"
#endif
@@ -112,9 +112,9 @@ class GSVector8i;
__forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate)
{
#if defined(_M_X86)
#if defined(ARCH_X86)
m = truncate ? _mm_cvttps_epi32(v) : _mm_cvtps_epi32(v);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
// GS thread uses default (nearest) rounding.
v4s = truncate ? vcvtq_s32_f32(v.v4s) : vcvtnq_u32_f32(v.v4s);
#endif
@@ -122,9 +122,9 @@ __forceinline_odr GSVector4i::GSVector4i(const GSVector4& v, bool truncate)
__forceinline_odr GSVector4::GSVector4(const GSVector4i& v)
{
#if defined(_M_X86)
#if defined(ARCH_X86)
m = _mm_cvtepi32_ps(v);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
v4s = vcvtq_f32_s32(v.v4s);
#endif
}
@@ -168,7 +168,7 @@ __forceinline_odr void GSVector8i::sw32_inv(GSVector8i& a, GSVector8i& b)
__forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v)
{
#ifndef _M_ARM64
#ifndef ARCH_ARM64
return GSVector4i(_mm_castps_si128(v.m));
#else
return GSVector4i(vreinterpretq_s32_f32(v.v4s));
@@ -177,7 +177,7 @@ __forceinline_odr GSVector4i GSVector4i::cast(const GSVector4& v)
__forceinline_odr GSVector4 GSVector4::cast(const GSVector4i& v)
{
#ifndef _M_ARM64
#ifndef ARCH_ARM64
return GSVector4(_mm_castsi128_ps(v.m));
#else
return GSVector4(vreinterpretq_f32_s32(v.v4s));
pcsx2/GS/Renderers/Common/GSVertex.h
+2 -2
View File
@@ -21,12 +21,12 @@ struct alignas(32) GSVertex
u32 FOG; // FOG:28
};
#if defined(_M_X86)
#if defined(ARCH_X86)
#if _M_SSE >= 0x500
__m256i mx;
#endif
__m128i m[2];
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
int32x4_t m[2];
#endif
};
pcsx2/GS/Renderers/DX11/D3D.cpp
+2 -2
View File
@@ -7,7 +7,7 @@
#include "GS/GSExtra.h"
#include "Host.h"
#ifdef _M_X86
#ifdef ARCH_X86
#include "GS/Renderers/Vulkan/GSDeviceVK.h"
#endif
@@ -457,7 +457,7 @@ GSRendererType D3D::GetPreferredRenderer()
default:
{
// Default is D3D11, but prefer DX12 on ARM (better drivers).
#ifdef _M_ARM64
#ifdef ARCH_ARM64
return GSRendererType::DX12;
#else
return GSRendererType::DX11;
pcsx2/GS/Renderers/SW/GSDrawScanline.h
+2 -2
View File
@@ -5,11 +5,11 @@
#include "GS/GSState.h"
#ifdef _M_X86
#ifdef ARCH_X86
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.all.h"
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.all.h"
#endif
#ifdef _M_ARM64
#ifdef ARCH_ARM64
#include "GS/Renderers/SW/GSSetupPrimCodeGenerator.arm64.h"
#include "GS/Renderers/SW/GSDrawScanlineCodeGenerator.arm64.h"
#endif
pcsx2/GS/Renderers/SW/GSScanlineEnvironment.h
+1 -1
View File
@@ -157,7 +157,7 @@ struct alignas(32) GSScanlineGlobalData // per batch variables, this is like a p
#endif
#ifdef _M_ARM64
#ifdef ARCH_ARM64
// Mini version of constant data for ARM64, we don't need all of it
alignas(16) u32 const_test_128b[8][4] = {
{0x00000000, 0x00000000, 0x00000000, 0x00000000},
pcsx2/Gif_Unit.h
+2 -2
View File
@@ -105,7 +105,7 @@ struct Gif_Tag
__ri void analyzeTag()
{
#ifdef _M_X86
#ifdef ARCH_X86
// zero out bits for registers which shouldn't be tested
__m128i vregs = _mm_loadl_epi64(reinterpret_cast<const __m128i*>(tag.REGS));
vregs = _mm_and_si128(vregs, _mm_srli_epi64(_mm_set1_epi32(0xFFFFFFFFu), (64 - nRegs * 4)));
@@ -118,7 +118,7 @@ struct Gif_Tag
// write out unpacked registers
_mm_storeu_si128(reinterpret_cast<__m128i*>(regs), vregs);
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
// zero out bits for registers which shouldn't be tested
u64 REGS64;
std::memcpy(&REGS64, tag.REGS, sizeof(u64));
pcsx2/IPU/IPU_MultiISA.cpp
+2 -2
View File
@@ -1374,7 +1374,7 @@ __fi static bool mpeg2_slice()
//Cr bias - 8 * 8
//Cb bias - 8 * 8
#if defined(_M_X86)
#if defined(ARCH_X86)
__m128i zeroreg = _mm_setzero_si128();
for (uint i = 0; i < (256+64+64) / 32; ++i)
@@ -1389,7 +1389,7 @@ __fi static bool mpeg2_slice()
s += 32;
d += 32;
}
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
uint8x16_t zeroreg = vmovq_n_u8(0);
for (uint i = 0; i < (256 + 64 + 64) / 32; ++i)
pcsx2/IPU/yuv2rgb.cpp
+2 -2
View File
@@ -42,7 +42,7 @@ void yuv2rgb_reference(void)
}
}
#if defined(_M_X86)
#if defined(ARCH_X86)
// Suikoden Tactics FMV speed results: Reference - ~72fps, SSE2 - ~120fps
// An AVX2 version is only slightly faster than an SSE2 version (+2-3fps)
@@ -136,7 +136,7 @@ __ri void yuv2rgb_sse2()
}
}
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
#if defined(_MSC_VER) && !defined(__clang__)
#include <arm64_neon.h>
pcsx2/IPU/yuv2rgb.h
+2 -2
View File
@@ -7,12 +7,12 @@
MULTI_ISA_DEF(extern void yuv2rgb_reference();)
#if defined(_M_X86)
#if defined(ARCH_X86)
#define yuv2rgb yuv2rgb_sse2
MULTI_ISA_DEF(extern void yuv2rgb_sse2();)
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
#define yuv2rgb yuv2rgb_neon
MULTI_ISA_DEF(extern void yuv2rgb_neon();)
pcsx2/VMManager.cpp
+5 -5
View File
@@ -207,7 +207,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error)
{
#define COMMON_DOWNLOAD_MESSAGE "PCSX2 builds can be downloaded from https://pcsx2.net/downloads/"
#if defined(_M_X86)
#if defined(ARCH_X86)
// On Windows, this gets called as a global object constructor, before any of our objects are constructed.
// So, we have to put it on the stack instead.
cpuinfo_initialize();
@@ -231,7 +231,7 @@ bool VMManager::PerformEarlyHardwareChecks(const char** error)
return false;
}
#endif
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
// Check page size. If it doesn't match, it is a fatal error.
const size_t runtime_host_page_size = HostSys::GetRuntimePageSize();
if (__pagesize != runtime_host_page_size)
@@ -2608,7 +2608,7 @@ void VMManager::LogCPUCapabilities()
LogUserPowerPlan();
#endif
#ifdef _M_X86
#ifdef ARCH_X86
std::string extensions;
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX)
extensions += "AVX ";
@@ -2616,7 +2616,7 @@ void VMManager::LogCPUCapabilities()
extensions += "AVX2 ";
if (g_cpu.vectorISA >= ProcessorFeatures::VectorISA::AVX512F)
extensions += "AVX512F ";
#ifdef _M_ARM64
#ifdef ARCH_ARM64
if (cpuinfo_has_arm_neon())
extensions += "NEON ";
#endif
@@ -2628,7 +2628,7 @@ void VMManager::LogCPUCapabilities()
Console.WriteLn();
#endif
#ifdef _M_ARM64
#ifdef ARCH_ARM64
const size_t runtime_cache_line_size = HostSys::GetRuntimeCacheLineSize();
if (__cachelinesize != runtime_cache_line_size)
{
pcsx2/VU0micro.cpp
+2 -2
View File
@@ -27,9 +27,9 @@ static __fi u32 vu0DenormalizeMicroStatus(u32 nstatus)
static __fi void vu0SetMicroFlags(u32* flags, u32 value)
{
#ifdef _M_X86
#ifdef ARCH_X86
_mm_store_si128(reinterpret_cast<__m128i*>(flags), _mm_set1_epi32(value));
#elif defined(_M_ARM64)
#elif defined(ARCH_ARM64)
vst1q_u32(flags, vdupq_n_u32(value));
#else
flags[0] = flags[1] = flags[2] = flags[3] = value;
tests/ctest/common/CMakeLists.txt
+1 -1
View File
@@ -6,7 +6,7 @@ add_pcsx2_test(common_test
string_util_tests.cpp
)
if(_M_X86)
if(ARCH_X86)
target_sources(common_test PRIVATE
x86emitter/codegen_tests.cpp
x86emitter/codegen_tests.h
tests/ctest/core/CMakeLists.txt
+1 -1
View File
@@ -14,7 +14,7 @@ target_link_libraries(core_test PUBLIC
common
)
if(DISABLE_ADVANCE_SIMD)
if(DISABLE_ADVANCE_SIMD AND ARCH_X86)
if(WIN32)
set(compile_options_avx2 /arch:AVX2)
set(compile_options_avx /arch:AVX)