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The Miscellaneous Special Registers Option provides zero to four scratch registers within the processor readable and writable by RSR, WSR, and XSR. These registers are privileged. They may be useful for some application-specific exception and interrupt processing tasks in the kernel. The MISC registers are undefined after reset. See ISA, 4.7.3 for details. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Read the documentation in qemu-doc.html or on http://wiki.qemu.org - QEMU team
Description
Original Xbox Emulator for Windows, macOS, and Linux (Active Development)
Readme
GPL-2.0
708 MiB
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