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Stefan Hajnoczi ffd642cb2c Merge tag 'pull-tcg-20250429' of https://gitlab.com/rth7680/qemu into staging 
Convert TCG backend code generators to TCGOutOp structures,
decomposing the monolithic tcg_out_op functions.

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmgRDgcdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+0SQf9Ef8IE5QWjXEws706
# q+1deeDV2xa1sKAHG5fnskk1bXM31Cy4koNdDQbHTtDWedNEzWKyR7FxjlRm+zSW
# 6CposaEEsCGxdKUbvraflGbWuf2NUZpJoreNGo9BYZkfNWE9yJ0HlypjpxclziRA
# G0Ro4XMevi+yVA3cd8lEmft9cW+woFrVWu5I4tucMwY/8gzWRiHV4Z5YCeCEjD3C
# 3YYukhRTaA+7Lyd1G3rcqh8uSsAGGv2NLO26upK1mnVtZOoS/CgKWfBq5enVEuDd
# X6T544ipz8Z3eXFgzTzK4nl7TpmO+XEUbja3op7psrLHU84puX1/47HLk4TkHlE+
# 6/95eA==
# =vzOx
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 29 Apr 2025 13:36:07 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20250429' of https://gitlab.com/rth7680/qemu: (161 commits)
  tcg/sparc64: Implement CTPOP
  tcg/sparc64: Unexport use_vis3_instructions
  tcg: Remove tcg_out_op
  tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}
  tcg: Convert qemu_ld{2} to TCGOutOpLoad{2}
  tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
  tcg: Remove INDEX_op_qemu_st8_*
  tcg: Stash MemOp size in TCGOP_FLAGS
  tcg: Merge INDEX_op_st*_{i32,i64}
  tcg: Convert st to TCGOutOpStore
  tcg: Merge INDEX_op_ld*_{i32,i64}
  tcg: Convert ld to TCGOutOpLoad
  tcg: Formalize tcg_out_goto_ptr
  tcg: Formalize tcg_out_br
  tcg: Formalize tcg_out_mb
  tcg: Remove add2/sub2 opcodes
  tcg/tci: Implement add/sub carry opcodes
  tcg/sparc64: Implement add/sub carry opcodes
  tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc
  tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
 2025-04-30 13:34:35 -04:00
Richard Henderson 70ab4f4ed9 tcg/sparc64: Implement CTPOP 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 33b6c61cce tcg/sparc64: Unexport use_vis3_instructions 
This variable is no longer used outside tcg-target.c.inc.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson eafecf0805 tcg: Remove tcg_out_op 
All integer opcodes are now converted to TCGOutOp.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 86fe5c2597 tcg: Convert qemu_st{2} to TCGOutOpLdSt{2} 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 3bedb9d3e2 tcg: Convert qemu_ld{2} to TCGOutOpLoad{2} 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson aae2456ac0 tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128} 
Merge into INDEX_op_{ld,st,ld2,st2}, where "2" indicates that two
inputs or outputs are required. This simplifies the processing of
i64/i128 depending on host word size.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 33aba058c8 tcg: Remove INDEX_op_qemu_st8_* 
The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson bf7ca5fb30 tcg: Stash MemOp size in TCGOP_FLAGS 
This will enable removing INDEX_op_qemu_st8_*_i32,
by exposing the operand size to constraint selection.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson a28f151d61 tcg: Merge INDEX_op_st*_{i32,i64} 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 4a686aa9d9 tcg: Convert st to TCGOutOpStore 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson e996804d40 tcg: Merge INDEX_op_ld*_{i32,i64} 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 0de5c9d1f5 tcg: Convert ld to TCGOutOpLoad 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson fee03fdde3 tcg: Formalize tcg_out_goto_ptr 
Split these functions out from tcg_out_op.
Define outop_goto_ptr generically.
Call tcg_out_goto_ptr from tcg_reg_alloc_op.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 3752a5a5ba tcg: Formalize tcg_out_br 
Split these functions out from tcg_out_op.
Call it directly from tcg_gen_code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson e038696c92 tcg: Formalize tcg_out_mb 
Most tcg backends already have a function for this;
the rest can split one out from tcg_out_op.
Call it directly from tcg_gen_code.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson f2b1708e80 tcg: Remove add2/sub2 opcodes 
All uses have been replaced by add/sub carry opcodes.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 4b0ee858be tcg/tci: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 9dd1ea33b2 tcg/sparc64: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 809069eaa3 tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc 
Pass the sparc COND_* value not the tcg TCG_COND_* value.
This makes the usage within add2/sub2 clearer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 41dd55c79c tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson cda7f93fa2 tcg/s390x: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 19b9fc2a39 tcg/s390x: Add TCG_CT_CONST_N32 
We were using S32 | U32 for add2/sub2.  But the ALGFI and SLGFI
insns that implement this both have uint32_t immediates.
This makes the composite range balanced and
enables use of -0xffffffff ... -0x80000001.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 1b6e25e300 tcg/s390x: Honor carry_live in tcg_out_movi 
Do not clobber flags if they're live.  Required in order
to perform register allocation on add/sub carry opcodes.
LA and AGHI are the same size, so use LA unconditionally.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 2329da9605 tcg/ppc: Implement add/sub carry opcodes 
Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson b15c0d11a2 tcg/arm: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 75351891b8 tcg/aarch64: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 867878c112 target/tricore: Use tcg_gen_addcio_i32 for gen_addc_CC 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 6ed4d97ff7 target/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 68188214d5 target/sh4: Use tcg_gen_addcio_i32 for addc 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 206c23e472 target/s390x: Use tcg_gen_addcio_i64 for op_addc64 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 3a6ec7d71a target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF 
Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 02b9d791be target/openrisc: Use tcg_gen_addcio_* for ADDC 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson fcfbd8f4a9 target/microblaze: Use tcg_gen_addcio_i32 
Use this in gen_addc and gen_rsubc, both of which need
add with carry-in and carry-out.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 14e9ff8514 target/hppa: Use tcg_gen_addcio_i64 
Use this in do_add, do_sub, and do_ds, all of which need
add with carry-in and carry-out.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson eea0f7ea51 target/arm: Use tcg_gen_addcio_* for ADCS 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson db3feb02b8 tcg: Add tcg_gen_addcio_{i32,i64,tl} 
Create a function for performing an add with carry-in
and producing carry out.  The carry-out result is boolean.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 0ad6d64b7b tcg/i386: Special case addci r, 0, 0 
Using addci with two zeros as input in order to capture the value
of the carry-in bit is common.  Special case this with sbb+neg so
that we do not have to load 0 into a register first.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson e37e98b711 tcg/i386: Implement add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 1f049cc5fd tcg/i386: Honor carry_live in tcg_out_movi 
Do not clobber flags if they're live.  Required in order
to perform register allocation on add/sub carry opcodes.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 7a89deae63 tcg: Use sub carry opcodes to expand sub2 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson c4d2e3d736 tcg: Use add carry opcodes to expand add2 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson e2f5ee36af tcg/optimize: With two const operands, prefer 0 in arg1 
For most binary operands, two const operands fold.
However, the add/sub carry opcodes have a third input.
Prefer "reg, zero, const" since many risc hosts have a
zero register that can fit a "reg, reg, const" insn format.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson aeb3514bd0 tcg/optimize: Handle add/sub with carry opcodes 
Propagate known carry when possible, and simplify the opcodes
to not require carry-in when known.  The result will be cleaned
up further by the subsequent liveness analysis pass.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson ee60315210 tcg: Add TCGOutOp structures for add/sub carry opcodes 
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 76f4278029 tcg: Add add/sub with carry opcodes and infrastructure 
Liveness needs to track carry-live state in order to
determine if the (hidden) output of the opcode is used.
Code generation needs to track carry-live state in order
to avoid clobbering cpu flags when loading constants.

So far, output routines and backends are unchanged.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 3e3689df4e tcg: Sink def, nb_iargs, nb_oargs loads in liveness_pass_1 
Sink the sets of the def, nb_iargs, nb_oargs variables to
the default and do_not_remove labels.  They're not really
needed beforehand, and it avoids preceding code from having
to keep them up-to-date.  Note that def had *not* been kept
up-to-date; thankfully only def->flags had been used and
those bits were constant between opcode changes.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 7d10d8e076 tcg: Move i into each for loop in liveness_pass_1 
Use per-loop variables instead of one 'i' for the function.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 0e08be0f54 tcg/riscv: Drop support for add2/sub2 
We now produce exactly the same code via generic expansion.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00
Richard Henderson 52c49c79b8 tcg/mips: Drop support for add2/sub2 
We now produce exactly the same code via generic expansion.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2025-04-28 13:40:17 -07:00