Pawan Gupta
74978391b2
target/i386: Make ITS_NO available to guests
...
When a system is not affected by Indirect Target Selection (ITS)
vulnerability, VMMs set ITS_NO bit in MSR IA32_ARCH_CAPABILITIES to let the
guest know that it is not affected.
Make it available to guests.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com >
Link: https://lore.kernel.org/r/8c1797e488b42650f62d816f25c58726eb522fad.1745946029.git.pawan.kumar.gupta@linux.intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2025-05-12 21:02:51 +02:00
Pawan Gupta
41bdd98128
target/i386: Export RFDS bit to guests
...
Register File Data Sampling (RFDS) is a CPU side-channel vulnerability
that may expose stale register value. CPUs that set RFDS_NO bit in MSR
IA32_ARCH_CAPABILITIES indicate that they are not vulnerable to RFDS.
Similarly, RFDS_CLEAR indicates that CPU is affected by RFDS, and has
the microcode to help mitigate RFDS.
Make RFDS_CLEAR and RFDS_NO bits available to guests.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com >
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com >
Reviewed-by: Zhao Liu <zhao1.liu@intel.com >
Message-ID: <9a38877857392b5c2deae7e7db1b170d15510314.1710341348.git.pawan.kumar.gupta@linux.intel.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2024-04-23 17:35:25 +02:00
Pawan Gupta
3a2a1f97ea
target/i386: Export GDS_NO bit to guests
...
Gather Data Sampling (GDS) is a side-channel attack using Gather
instructions. Some Intel processors will set ARCH_CAP_GDS_NO bit in
MSR IA32_ARCH_CAPABILITIES to report that they are not vulnerable to
GDS.
Make this bit available to guests.
Closes: https://lore.kernel.org/qemu-devel/CAMGffEmG6TNq0n3+4OJAgXc8J0OevY60KHZekXCBs3LoK9vehA@mail.gmail.com/
Reported-by: Jack Wang <jinpu.wang@ionos.com >
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com >
Tested-by: Jack Wang <jinpu.wang@ionos.com >
Tested-by: Daniel Sneddon <daniel.sneddon@linux.intel.com >
Message-ID: <fde42d81ce454477ca8e27d5429a190b7366fe86.1692074650.git.pawan.kumar.gupta@linux.intel.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2023-09-21 10:39:51 +02:00
Pawan Gupta
5bef742cc4
target/i386: Export MSR_ARCH_CAPABILITIES bits to guests
...
On Intel CPUs there are certain bits in MSR_ARCH_CAPABILITIES that
indicates if the CPU is not affected by a vulnerability. Without these
bits guests may try to deploy the mitigation even if the CPU is not
affected.
Export the bits to guests that indicate immunity to hardware
vulnerabilities.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com >
Message-ID: <63d85cc76d4cdc51e6c732478b81d8f13be11e5a.1687551881.git.pawan.kumar.gupta@linux.intel.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2023-06-29 10:49:43 +02:00
Pawan Gupta
7fac38635e
target/i386: Export TAA_NO bit to guests
...
TSX Async Abort (TAA) is a side channel attack on internal buffers in
some Intel processors similar to Microachitectural Data Sampling (MDS).
Some future Intel processors will use the ARCH_CAP_TAA_NO bit in the
IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable to
TAA. Make this bit available to guests.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
2019-11-19 10:01:32 +01:00
Pawan Gupta