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target/arm: Implement GCSSS2

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Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20251008215613.300150-55-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson
2025-10-08 14:55:54 -07:00
committed by Peter Maydell
parent 22d20e3804
commit e85fc2c623
3 changed files with 38 additions and 0 deletions
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target/arm/cpregs-gcs.c
+3
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@@ -132,6 +132,9 @@ static const ARMCPRegInfo gcs_reginfo[] = {
{ .name = "GCSSS1", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 3, .crn = 7, .crm = 7, .opc2 = 2,
.access = PL0_W, .type = ARM_CP_GCSSS1 },
{ .name = "GCSSS2", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 3, .crn = 7, .crm = 7, .opc2 = 3,
.access = PL0_R, .type = ARM_CP_GCSSS2 },
{ .name = "GCSPUSHX", .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 7, .opc2 = 4,
.access = PL1_W, .accessfn = access_gcspushx, .fgt = FGT_NGCSEPP,
target/arm/cpregs.h
+1
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@@ -54,6 +54,7 @@ enum {
ARM_CP_GCSPOPX = 0x000b,
ARM_CP_GCSPOPCX = 0x000c,
ARM_CP_GCSSS1 = 0x000d,
ARM_CP_GCSSS2 = 0x000e,
/* Flag: reads produce resetvalue; writes ignored. */
ARM_CP_CONST = 1 << 4,
target/arm/tcg/translate-a64.c
+34
View File
@@ -2668,6 +2668,35 @@ static void gen_gcsss1(DisasContext *s, int rt)
tcg_gen_andi_i64(gcspr, inptr, ~7);
}
static void gen_gcsss2(DisasContext *s, int rt)
{
TCGv_i64 gcspr = cpu_gcspr[s->current_el];
int mmuidx = core_gcs_mem_index(s->mmu_idx);
MemOp mop = finalize_memop(s, MO_64 | MO_ALIGN);
TCGv_i64 outptr = tcg_temp_new_i64();
TCGv_i64 tmp = tcg_temp_new_i64();
TCGLabel *fail_label =
delay_exception(s, EXCP_UDEF, syn_gcs_data_check(GCS_IT_GCSSS2, rt));
/* Validate that the new stack has an in-progress cap. */
tcg_gen_qemu_ld_i64(outptr, gcspr, mmuidx, mop);
tcg_gen_andi_i64(tmp, outptr, 7);
tcg_gen_brcondi_i64(TCG_COND_NE, tmp, 5, fail_label);
/* Push a valid cap to the old stack. */
tcg_gen_andi_i64(outptr, outptr, ~7);
tcg_gen_addi_i64(outptr, outptr, -8);
tcg_gen_deposit_i64(tmp, outptr, tcg_constant_i64(1), 0, 12);
tcg_gen_qemu_st_i64(tmp, outptr, mmuidx, mop);
tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
/* Pop the in-progress cap from the new stack. */
tcg_gen_addi_i64(gcspr, gcspr, 8);
/* Return a pointer to the old stack cap. */
tcg_gen_mov_i64(cpu_reg(s, rt), outptr);
}
/*
* Look up @key, returning the cpreg, which must exist.
* Additionally, the new cpreg must also be accessible.
@@ -3014,6 +3043,11 @@ static void handle_sys(DisasContext *s, bool isread,
gen_gcsss1(s, rt);
}
return;
case ARM_CP_GCSSS2:
if (s->gcs_en) {
gen_gcsss2(s, rt);
}
return;
default:
g_assert_not_reached();
}