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target/m68k: Remove pointless @cpu_halted TCGv

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Avoid registering a TCGv to write the generic CPUState::halted
field. Access it directly via @env in both STOP / HALT opcodes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250925012454.60602-1-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé
2025-08-26 06:42:05 +02:00
parent eefee97c4c
commit cb4ca3b358
1 changed files with 4 additions and 7 deletions
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target/m68k/translate.c
+4 -7
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@@ -44,8 +44,6 @@
#undef DEFO32
#undef DEFO64
static TCGv_i32 cpu_halted;
static char cpu_reg_names[2 * 8 * 3 + 5 * 4];
static TCGv cpu_dregs[8];
static TCGv cpu_aregs[8];
@@ -77,9 +75,6 @@ void m68k_tcg_init(void)
#undef DEFO32
#undef DEFO64
cpu_halted = tcg_global_mem_new_i32(tcg_env,
-offsetof(M68kCPU, env) +
offsetof(CPUState, halted), "HALTED");
p = cpu_reg_names;
for (i = 0; i < 8; i++) {
sprintf(p, "D%d", i);
@@ -4506,7 +4501,8 @@ DISAS_INSN(halt)
gen_exception(s, s->pc, EXCP_SEMIHOSTING);
return;
}
tcg_gen_movi_i32(cpu_halted, 1);
tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
offsetof(CPUState, halted) - offsetof(M68kCPU, env));
gen_exception(s, s->pc, EXCP_HLT);
}
@@ -4522,7 +4518,8 @@ DISAS_INSN(stop)
ext = read_im16(env, s);
gen_set_sr_im(s, ext, 0);
tcg_gen_movi_i32(cpu_halted, 1);
tcg_gen_st_i32(tcg_constant_i32(1), tcg_env,
offsetof(CPUState, halted) - offsetof(M68kCPU, env));
gen_exception(s, s->pc, EXCP_HLT);
}