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update parallel rsp
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@@ -45,8 +45,6 @@ RSP::JIT::CPU cpu;
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#endif
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uint32_t MFC0_count[32];
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uint32_t SP_STATUS_TIMEOUT;
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uint32_t dma0_timer;
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uint32_t dma1_timer;
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} // namespace RSP
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extern "C"
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@@ -76,20 +74,19 @@ extern "C"
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}
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#endif
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EXPORT unsigned int CALL DoRspCycles(unsigned int cycles)
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EXPORT unsigned int CALL DoRspCycles(unsigned int first_run)
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{
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if (*RSP::rsp.SP_STATUS_REG & (SP_STATUS_HALT | SP_STATUS_BROKE))
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return 0;
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// We don't know if Mupen from the outside invalidated our IMEM.
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RSP::cpu.invalidate_imem();
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if (first_run)
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RSP::cpu.invalidate_imem();
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// Run CPU until we either break or we need to fire an IRQ.
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RSP::cpu.get_state().pc = *RSP::rsp.SP_PC_REG & 0xfff;
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RSP::cpu.get_state().instruction_count = 0;
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RSP::cpu.get_state().last_instruction_type = RSP::VU_INSTRUCTION;
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RSP::dma0_timer = 0;
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RSP::dma1_timer = 0;
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#ifdef INTENSE_DEBUG
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fprintf(stderr, "RUN TASK: %u\n", RSP::cpu.get_state().pc);
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@@ -119,8 +116,6 @@ extern "C"
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else if (*RSP::rsp.SP_SEMAPHORE_REG != 0) // Semaphore lock fixes.
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{
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}
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else
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RSP::SP_STATUS_TIMEOUT = 16; // From now on, wait 16 times, not 0x7fff
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// CPU restarts with the correct SIGs.
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*RSP::rsp.SP_STATUS_REG &= ~SP_STATUS_HALT;
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@@ -188,7 +183,7 @@ extern "C"
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RSP::cpu.get_state().cp0.irq = RSP::rsp.MI_INTR_REG;
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// From CXD4.
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RSP::SP_STATUS_TIMEOUT = 0xffff;
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RSP::SP_STATUS_TIMEOUT = 256;
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RSP::cpu.set_dmem(reinterpret_cast<uint32_t *>(Rsp_Info.DMEM));
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RSP::cpu.set_imem(reinterpret_cast<uint32_t *>(Rsp_Info.IMEM));
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