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Henrik RydgårdandClaude Opus 5.5
41851007a2
The ME sees the main CPU's RAM, but has its own eDRAM at 0 (with 0x80000000 and 0xA0000000 mirrors) where the main CPU has its scratchpad, its own memory where the main CPU has VRAM, and both CPUs share the boot page at 0xBFC00000. - The ME's own memory is views in the main arena flagged MV_ME_ONLY, which only Memory::CreateMESpace() maps, into a second reservation along with the shared views at their same arena positions. It gets its own block shadow. - The eDRAM (MV_EDRAM) is the ME's half of the eDRAM chip, the GE's VRAM being the other: 2MB on the PSP-1000 (whose resident ME image says so), 4MB on the others (from mcidclan's libmecore, not hardware-checked). - At VRAM's addresses, through 0x44000000 and 0xA4000000 alike, the ME doesn't see VRAM but memory of its own (pspautotest me/vram, on a PSP-1000): where homebrew keeps the VME's buffers. Its size isn't known; 2MB with VRAM's mirrors here, and no depth layout on 16-bit accesses. - 0xA0000000 reaches physical memory uncached, so RAM is mapped at 0xA8000000 too. - The boot page is a view too, which the main CPU reaches through a new MMIO device (in savestates from MMIO section version 2). The ME runs code from it, uncached, so the main CPU's writes invalidate code there. On masked platforms it isn't mapped, and the device uses a plain buffer. - AddressSpace has IsValidAddress etc, with the ME's rules when edramSize is set, and the interpreters and the IR interpreter check and fetch instructions through their state's space. The IR compiler's checks still use the main CPU's, until the ME gets a JIT. - On Darwin, MemArena can hold several view reservations. Masked platforms (iOS, 32-bit) don't get an ME space yet. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>