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ppsspp/Core/MIPS/IR
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Unknown W. Brackets c2a1caa2a2 irjit: Prevent corruption on purge temps pass. 
If a switch occurs and then something clobbers the dest of that switch, we
were wiping out the first of those three instructions incorrectly.
2022-07-21 09:06:37 -07:00
..
IRAsm.cpp
Remove most instances of base/logging.h from Common, Core, GPU, more
2020-08-15 19:08:44 +02:00
IRCompALU.cpp
Common: Maintain C++11 support in sign extend.
2021-01-31 08:44:02 -08:00
IRCompBranch.cpp
jit: Count delay slot cycles separately.
2021-04-12 07:04:22 -07:00
IRCompFPU.cpp
jit: Fix conditional disable flags.
2021-01-09 11:50:32 -08:00
IRCompLoadStore.cpp
jit: Fix conditional disable flags.
2021-01-09 11:50:32 -08:00
IRCompVFPU.cpp
Global: Remove some unused variables.
2021-02-15 11:59:45 -08:00
IRFrontend.cpp
Remove most instances of base/logging.h from Common, Core, GPU, more
2020-08-15 19:08:44 +02:00
IRFrontend.h
Minor cleanup
2018-01-10 09:19:27 +01:00
IRInst.cpp
irjit: Fix mtv for INF4.
2021-01-09 12:43:50 -08:00
IRInst.h
jit: Avoid using mips identifier directly.
2021-02-26 07:24:58 -08:00
IRInterpreter.cpp
Add ARM64_NEON compile arch flag
2022-06-25 07:29:20 +02:00
IRInterpreter.h
jit: Avoid using mips identifier directly.
2021-02-26 07:24:58 -08:00
IRJit.cpp
irjit: Allow unaligned loads by default.
2022-07-11 17:36:39 -07:00
IRJit.h
Global: Reduce includes of common headers.
2022-01-30 16:35:33 -08:00
IRPassSimplify.cpp
irjit: Prevent corruption on purge temps pass.
2022-07-21 09:06:37 -07:00
IRPassSimplify.h
irjit: Combine lwl/lwr and swl/swr, like before.
2018-01-07 21:05:58 -08:00
IRRegCache.cpp
jit-ir: Less instructions cause flushing in constant propagation.
2016-05-08 23:25:08 +02:00
IRRegCache.h
jit-ir: Less instructions cause flushing in constant propagation.
2016-05-08 23:25:08 +02:00