Files
ppsspp/GPU/Software
Henrik RydgårdandClaude Opus 5.5 d9b36b7e46 CrossSIMD: Keep the C++ fallback's integer ops defined, like the SIMD ones
The fallback (which RISC-V uses) did its integer arithmetic in plain int,
where signed overflow and left shifts of negative values are undefined,
and converted out of range floats with a cast, which is undefined too:
RISC-V gives INT_MAX for NaN where SSE gives INT_MIN and NEON 0. With GCC
on RISC-V that broke GEUVSpanCore in the GEMath unit test. Now the
arithmetic wraps through uint32_t, like the SIMD instructions, and an out
of range or NaN conversion gives INT_MIN, like SSE.

Also skip GERowSum's zero terms before computing their shift, as their
exponent can be INT_MIN. Found with -fsanitize=undefined on the fallback.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-09 11:12:48 +02:00
..

To get to 100% compatibility, we will need a software renderer as there are games out there that do tricks
that can't really be faked in a sensible way. Useful for homebrew too that mix sw and accel rendering.