Files
ppsspp/Core/MIPS
Unknown W. Brackets e0afdfe9be Core: Leave delay slot when re-entering jit.
If stepping, we may get into a delay slot within interpreted code, and
then try to run (i.e. Step Out), which won't clear the delay slot
properly.

This can cause weird behavior when interp is used again later, in addition
to immediate wrong branching behavior.
2021-05-09 08:52:38 -07:00
..
2021-04-24 15:48:17 -07:00
2014-11-23 21:09:40 +01:00
2019-10-30 22:35:13 +01:00
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2016-05-01 11:35:16 +02:00
2021-04-25 19:26:16 -07:00