Henrik RydgårdandGitHub 4aa2b1fcac Merge pull request #17783 from unknownbrackets/riscv-jit ...

Implement float/vec operations in RISC-V jit

2023-07-28 08:38:19 +02:00

..

Arm64Asm.cpp

arm64jit: When rouding unset, use nearest.

2023-07-25 20:30:05 -07:00

Arm64CompALU.cpp

jit: Reduce some include pollution.

2022-10-27 23:26:44 -07:00

Arm64CompBranch.cpp

arm64jit: Handle branch/jump in branch delay slots.

2022-09-03 21:04:54 -07:00

Arm64CompFPU.cpp

arm64jit: When rouding unset, use nearest.

2023-07-25 20:30:05 -07:00

Arm64CompLoadStore.cpp

Core: Cleanup some sign extensions for clarity.

2023-04-05 17:16:51 -07:00

Arm64CompReplace.cpp

cmake: Detect features at compile time

2016-10-19 12:31:19 +02:00

Arm64CompVFPU.cpp

Debugger: Make disasm more thread safe.

2023-04-29 09:56:17 -07:00

Arm64Jit.cpp

Add logging when loading a save state that has "unknown-prefix-mode" set

2023-06-14 10:23:23 +02:00

Arm64Jit.h

riscv: Initial untested dispatcher.

2023-07-23 18:01:00 -07:00

Arm64RegCache.cpp

riscv: Add FPU regcache.

2023-07-25 20:33:56 -07:00

Arm64RegCache.h

jit: Reduce some include pollution.

2022-10-27 23:26:44 -07:00

Arm64RegCacheFPU.cpp

riscv: Add FPU regcache.

2023-07-25 20:33:56 -07:00

Arm64RegCacheFPU.h

riscv: Add FPU regcache.

2023-07-25 20:33:56 -07:00