Henrik Rydgård dddf63d057 Merge pull request #17993 from unknownbrackets/x86-jit-minor ...

x86jit: Replacements, expose for profiling better

2023-08-28 10:23:00 +02:00

..

RiscVAsm.cpp

riscv: Use a single reg cache.

2023-08-20 12:42:11 -07:00

RiscVCompALU.cpp

riscv: Use a single reg for LO/HI.

2023-08-20 14:49:09 -07:00

RiscVCompBranch.cpp

x86jit: Stub out op categories to files.

2023-08-20 22:28:54 -07:00

RiscVCompFPU.cpp

x86jit: Implement trig/reciprocals.

2023-08-27 23:24:30 -07:00

RiscVCompLoadStore.cpp

riscv: Mark normalized32 after mapping.

2023-08-20 12:42:11 -07:00

RiscVCompSystem.cpp

riscv: Use automapping for special cases too.

2023-08-20 12:42:11 -07:00

RiscVCompVec.cpp

riscv: Use automapping for special cases too.

2023-08-20 12:42:11 -07:00

RiscVJit.cpp

x86jit: Improve some debug labels.

2023-08-27 12:51:29 -07:00

RiscVJit.h

riscv: Use a single reg cache.

2023-08-20 12:42:11 -07:00

RiscVRegCache.cpp

x86jit: Implement a few more float ops, shuffle.

2023-08-27 23:24:30 -07:00

RiscVRegCache.h

x86jit: Implement a few more float ops, shuffle.

2023-08-27 23:24:30 -07:00