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The riscv64 cross build is the first target to take the non-SIMD path, and it didn't compile: - LoadF24x4 called LoadR24x3_One, which doesn't exist. It should shift all four lanes, like the SSE/NEON/LSX versions do. - isnan/isinf were unqualified, and <cmath> wasn't included. - WithLane3From and AnyCompareBitsSet were missing entirely. LoadF24x3_One also left lane 3 as zero, where all three SIMD versions set it to 1.0f - a behavioural bug that would only have shown up once someone ran this path. Verified by flipping TEST_FALLBACK in the header: the whole tree builds, and with the scalar path in use the unit tests and pspautotests both pass in full (342/342, software renderer, which leans on this code heavily). Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>