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IRJit is now the base the IR JITs share: the frontend, the table of guest blocks, and compiling and invalidating them. IRInterpreterJit and IRNativeJit are the two kinds. Only IRInterpreterJit keeps IR, in its arena, along with its dispatch loop and per-block profile. The native JITs no longer keep the IR they compiled from. The debugger and the --jit-profile report compile a native block's IR again when they want it, on a copy of the frontend's state, which gives what ran unless the code or that state has changed since. IRBlockCache and IRBlock become JitBlockTable and JitBlock: where each block came from, the page lookup for invalidation, and the block shadow entry (an arena or native code offset, depending on the JIT). One IRJitDebugInterface serves both JITs, taking the MIPS code from the table and the IR and host code from the JIT, in place of the native JIT's own debug interface. The native backends don't see the table at all. They compile a span of IR for a block number and start PC, and keep what they need about their own blocks (start PC, code offset, which block starts where, for linking) next to the exits they already tracked. The register cache takes the instructions directly. The tracer's block index now goes into the IR before the block is stored, so native blocks get it too. The unused FindByCookie goes. TestJit checks that the native JIT keeps no IR, and can still show it. The JIT stats overlay no longer shows IR for the native JITs. MIPSState can't be copied, now that it owns its JIT. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
391 lines
12 KiB
C++
391 lines
12 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ppsspp_config.h"
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#include <cstdlib>
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#include <mutex>
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#include "ext/disarm.h"
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#include "ext/riscv-disas.h"
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#include "ext/udis86/udis86.h"
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#include "ext/loongarch-disasm.h"
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#include "Common/LogReporting.h"
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#include "Common/StringUtils.h"
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#include "Common/Serialize/Serializer.h"
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#include "Common/Serialize/SerializeFuncs.h"
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#include "Core/Util/DisArm64.h"
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#include "Core/MIPS/IR/IRJit.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/MIPS/MIPSCodeUtils.h"
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#include "Core/MIPS/MIPSTables.h"
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#if PPSSPP_ARCH(ARM)
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#include "../ARM/ArmIRJit.h"
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#elif PPSSPP_ARCH(ARM64)
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#include "../ARM64/Arm64IRJit.h"
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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#include "../x86/X64IRJit.h"
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#elif PPSSPP_ARCH(RISCV64)
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#include "../RiscV/RiscVJit.h"
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#elif PPSSPP_ARCH(LOONGARCH64)
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#include "../LoongArch64/LoongArch64Jit.h"
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#endif
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namespace MIPSComp {
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void JitAt(MIPSState *mips) {
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// TODO: We could probably check for a bad pc here, and fire an exception. Could spare us from some crashes.
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// Although, we just tried to load from this address to check for a JIT block, and if we're here, that succeeded..
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mips->jit->Compile(mips->pc);
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}
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void DoDummyJitState(PointerWrap &p, const MIPSState *mips) {
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// This is here so the savestate matches between jit and non-jit.
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auto s = p.Section("Jit", 1, 2);
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if (!s)
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return;
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// This is startDefaultPrefix. Writing false made a JIT loading the state assume an uneaten
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// prefix for the rest of the session.
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bool dummy = mips->HasDefaultPrefix();
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Do(p, dummy);
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if (s >= 2) {
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dummy = true;
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Do(p, dummy);
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}
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}
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BranchInfo::BranchInfo(u32 pc, MIPSOpcode o, MIPSOpcode delayO, bool al, bool l)
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: compilerPC(pc), op(o), delaySlotOp(delayO), likely(l), andLink(al) {
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delaySlotInfo = MIPSGetInfo(delaySlotOp).value;
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delaySlotIsBranch = (delaySlotInfo & (IS_JUMP | IS_CONDBRANCH)) != 0;
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}
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u32 ResolveNotTakenTarget(const BranchInfo &branchInfo) {
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u32 notTakenTarget = branchInfo.compilerPC + 8;
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if ((branchInfo.delaySlotInfo & (IS_JUMP | IS_CONDBRANCH)) != 0) {
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// If a branch has a j/jr/jal/jalr as a delay slot, that is run if the branch is not taken.
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// TODO: Technically, in the likely case, we should somehow suppress andLink on this exit.
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bool isJump = (branchInfo.delaySlotInfo & IS_JUMP) != 0;
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// If the delay slot is a branch, likely skips it.
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if (isJump || !branchInfo.likely)
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notTakenTarget -= 4;
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// For a branch (not a jump), it actually should try the delay slot and take its target potentially.
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// This is similar to the VFPU case and has not been seen, so just report it.
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if (!isJump && SignExtend16ToU32(branchInfo.delaySlotOp) != SignExtend16ToU32(branchInfo.op) - 1)
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ERROR_LOG_REPORT(Log::JIT, "Branch in branch delay slot at %08x with different target", branchInfo.compilerPC);
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if (isJump && branchInfo.likely && (branchInfo.delaySlotInfo & (OUT_RA | OUT_RD)) != 0)
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ERROR_LOG_REPORT(Log::JIT, "Jump in likely branch delay slot with link at %08x", branchInfo.compilerPC);
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}
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return notTakenTarget;
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}
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JitInterface *CreateNativeJit(MIPSState *mipsState) {
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#if PPSSPP_ARCH(ARM)
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return new MIPSComp::ArmIRJit(mipsState);
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#elif PPSSPP_ARCH(ARM64)
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return new MIPSComp::Arm64IRJit(mipsState);
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#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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return new MIPSComp::X64IRJit(mipsState);
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#elif PPSSPP_ARCH(RISCV64)
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return new MIPSComp::RiscVJit(mipsState);
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#elif PPSSPP_ARCH(LOONGARCH64)
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return new MIPSComp::LoongArch64Jit(mipsState);
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#else
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// No native JIT for this architecture.
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return new MIPSComp::IRInterpreterJit(mipsState);
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#endif
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}
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}
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#if PPSSPP_PLATFORM(WINDOWS) && !defined(__LIBRETRO__)
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#define DISASM_ALL 1
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#endif
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#if PPSSPP_ARCH(ARM) || defined(DISASM_ALL)
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// We compile this for x86 as well because it may be useful when developing the ARM JIT on a PC.
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std::vector<std::string> DisassembleArm2(const u8 *data, int size) {
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std::vector<std::string> lines;
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char temp[256];
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int bkpt_count = 0;
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lines.reserve(size / 4);
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for (int i = 0; i < size; i += 4) {
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const u32 *codePtr = (const u32 *)(data + i);
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u32 inst = codePtr[0];
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u32 next = (i < size - 4) ? codePtr[1] : 0;
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// MAGIC SPECIAL CASE for MOVW/MOVT readability!
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if ((inst & 0x0FF00000) == 0x03000000 && (next & 0x0FF00000) == 0x03400000) {
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u32 low = ((inst & 0x000F0000) >> 4) | (inst & 0x0FFF);
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u32 hi = ((next & 0x000F0000) >> 4) | (next & 0x0FFF);
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int reg0 = (inst & 0x0000F000) >> 12;
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int reg1 = (next & 0x0000F000) >> 12;
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if (reg0 == reg1) {
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snprintf(temp, sizeof(temp), "MOV32 %s, %04x%04x", ArmRegName(reg0), hi, low);
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lines.push_back(temp);
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i += 4;
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continue;
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}
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}
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ArmDis((u32)(intptr_t)codePtr, inst, temp, sizeof(temp), false);
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std::string buf = temp;
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if (buf == "BKPT #1") {
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bkpt_count++;
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} else {
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if (bkpt_count) {
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lines.push_back(StringFromFormat("BKPT #1 (x%d)", bkpt_count));
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bkpt_count = 0;
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}
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lines.push_back(buf);
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}
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}
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if (bkpt_count) {
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lines.push_back(StringFromFormat("BKPT #1 (x%d)", bkpt_count));
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}
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return lines;
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}
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#endif
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std::string AddAddress(const std::string &buf, uint64_t addr) {
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char buf2[16];
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snprintf(buf2, sizeof(buf2), "%04x%08x", (uint32_t)(addr >> 32), (uint32_t)(addr & 0xFFFFFFFF));
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return std::string(buf2) + " " + buf;
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}
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#if PPSSPP_ARCH(ARM64) || defined(DISASM_ALL)
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static bool Arm64SymbolCallback(char *buffer, int bufsize, uint8_t *address) {
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if (mipsr4k.jit) {
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std::string name;
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if (mipsr4k.jit->DescribeCodePtr(address, name)) {
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truncate_cpy(buffer, bufsize, name);
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return true;
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}
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}
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return false;
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}
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std::vector<std::string> DisassembleArm64(const u8 *data, int size) {
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std::vector<std::string> lines;
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char temp[256];
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int bkpt_count = 0;
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lines.reserve(size / 4);
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for (int i = 0; i < size; i += 4) {
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const u32 *codePtr = (const u32 *)(data + i);
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uint64_t addr = (intptr_t)codePtr;
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u32 inst = codePtr[0];
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u32 next = (i < size - 4) ? codePtr[1] : 0;
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// MAGIC SPECIAL CASE for MOVZ+MOVK readability!
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if (((inst >> 21) & 0x3FF) == 0x294 && ((next >> 21) & 0x3FF) == 0x395) {
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u32 low = (inst >> 5) & 0xFFFF;
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u32 hi = (next >> 5) & 0xFFFF;
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int reg0 = inst & 0x1F;
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int reg1 = next & 0x1F;
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char r = (inst >> 31) ? 'x' : 'w';
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if (reg0 == reg1) {
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snprintf(temp, sizeof(temp), "movi32 %c%d, %04x%04x", r, reg0, hi, low);
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lines.push_back(AddAddress(temp, addr));
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i += 4;
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continue;
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}
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}
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Arm64Dis((intptr_t)codePtr, inst, temp, sizeof(temp), false, Arm64SymbolCallback);
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std::string buf = temp;
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if (buf == "BKPT 1") {
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bkpt_count++;
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} else {
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if (bkpt_count) {
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lines.push_back(StringFromFormat("BKPT 1 (x%d)", bkpt_count));
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bkpt_count = 0;
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}
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if (true) {
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buf = AddAddress(buf, addr);
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}
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lines.push_back(buf);
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}
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}
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if (bkpt_count) {
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lines.push_back(StringFromFormat("BKPT 1 (x%d)", bkpt_count));
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}
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return lines;
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}
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#endif
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#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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const char *ppsspp_resolver(struct ud*,
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uint64_t addr,
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int64_t *offset) {
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// For some reason these don't seem to trigger..
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if (addr >= (uint64_t)(¤tMIPS->r[0]) && addr < (uint64_t)¤tMIPS->r[32]) {
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*offset = addr - (uint64_t)(¤tMIPS->r[0]);
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return "mips.r";
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} else if (addr >= (uint64_t)(¤tMIPS->v[0]) && addr < (uint64_t)¤tMIPS->v[128]) {
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*offset = addr - (uint64_t)(¤tMIPS->v[0]);
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return "mips.v";
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} else if (addr == (uint64_t)(¤tMIPS->downcount)) {
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return "mips.downcount";
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} else if (addr == (uint64_t)(¤tMIPS->fpcond)) {
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return "mips.fpcond";
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} else if (addr == (uint64_t)(¤tMIPS->temp)) {
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return "mips.temp";
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} else if (addr == (uint64_t)(¤tMIPS->pc)) {
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return "mips.pc";
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} else if (addr == (uint64_t)(¤tMIPS->hi)) {
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return "mips.hi";
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} else if (addr == (uint64_t)(¤tMIPS->lo)) {
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return "mips.lo";
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} else if (addr == (uint64_t)(¤tMIPS->fcr31)) {
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return "mips.fcr31";
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} else if (addr >= (uint64_t)(¤tMIPS->vfpuCtrl[0]) && addr < (uint64_t)(¤tMIPS->vfpuCtrl[16])) {
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return "mips.vfpuCtrl";
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}
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// But these do.
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// UGLY HACK because the disassembler API is terrible
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static char buf[128];
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std::string str;
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if (mipsr4k.jit && mipsr4k.jit->DescribeCodePtr((u8 *)(uintptr_t)addr, str)) {
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*offset = 0;
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truncate_cpy(buf, sizeof(buf), str);
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return buf;
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}
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return NULL;
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}
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std::vector<std::string> DisassembleX86(const u8 *data, int size, std::vector<int> *offsets) {
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std::vector<std::string> lines;
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ud_t ud_obj;
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ud_init(&ud_obj);
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ud_set_mode(&ud_obj, sizeof(void*) * 8);
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ud_set_pc(&ud_obj, (intptr_t)data);
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ud_set_vendor(&ud_obj, UD_VENDOR_ANY);
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ud_set_syntax(&ud_obj, UD_SYN_INTEL);
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ud_set_sym_resolver(&ud_obj, &ppsspp_resolver);
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ud_set_input_buffer(&ud_obj, data, size);
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int int3_count = 0;
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int int3_offset = 0;
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while (ud_disassemble(&ud_obj) != 0) {
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const int offset = (int)(ud_insn_off(&ud_obj) - (uint64_t)(intptr_t)data);
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const char *buf = ud_insn_asm(&ud_obj);
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if (!buf) {
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lines.push_back("[bad]");
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if (offsets)
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offsets->push_back(offset);
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continue;
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}
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std::string str = buf;
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if (str == "int3") {
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if (int3_count == 0)
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int3_offset = offset;
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int3_count++;
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} else {
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if (int3_count) {
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lines.push_back(StringFromFormat("int3 (x%d)", int3_count));
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if (offsets)
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offsets->push_back(int3_offset);
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int3_count = 0;
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}
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lines.push_back(str);
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if (offsets)
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offsets->push_back(offset);
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}
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}
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if (int3_count) {
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lines.push_back(StringFromFormat("int3 (x%d)", int3_count));
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if (offsets)
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offsets->push_back(int3_offset);
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}
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return lines;
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}
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#endif
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#if PPSSPP_ARCH(RISCV64) || defined(DISASM_ALL)
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std::vector<std::string> DisassembleRV64(const u8 *data, int size) {
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std::vector<std::string> lines;
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int invalid_count = 0;
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auto invalid_flush = [&]() {
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if (invalid_count != 0) {
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lines.push_back(StringFromFormat("(%d invalid bytes)", invalid_count));
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invalid_count = 0;
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}
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};
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char temp[512];
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rv_inst inst;
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size_t len;
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for (int i = 0; i < size; ) {
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riscv_inst_fetch(data + i, &inst, &len);
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if (len == 0) {
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// Force align in case we're somehow unaligned.
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len = 2 - ((uintptr_t)data & 1);
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invalid_count += (int)len;
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i += (int)len;
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continue;
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}
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invalid_flush();
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riscv_disasm_inst(temp, sizeof(temp), rv64, (uintptr_t)data + i, inst);
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lines.push_back(ReplaceAll(temp, "\t", " "));
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i += (int)len;
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}
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invalid_flush();
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return lines;
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}
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#endif
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#if PPSSPP_ARCH(LOONGARCH64) || defined(DISASM_ALL)
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std::vector<std::string> DisassembleLA64(const u8 *data, int size) {
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std::vector<std::string> lines;
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int invalid_count = 0;
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auto invalid_flush = [&]() {
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if (invalid_count != 0) {
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lines.push_back(StringFromFormat("(%d invalid bytes)", invalid_count));
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invalid_count = 0;
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}
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};
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char temp[512];
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Ins ins;
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for (int i = 0; i < size; i += 4) {
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const u32 *codePtr = (const u32 *)(data + i);
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invalid_flush();
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la_disasm(*codePtr, &ins);
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sprint_ins(&ins, temp);
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lines.push_back(ReplaceAll(temp, "\t", " "));
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}
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invalid_flush();
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return lines;
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}
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#endif
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