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The JITs used to find a block by overwriting its first instruction with an "emuhack" holding the offset into the code space, and replacement functions installed their own emuhack the same way. Anything that read code (savestates, the debugger, memory dumps, cheats, the function hasher, games reading their own code) had to translate them back. Blocks now live in a block shadow: one u32 per guest instruction, indexed by the PC masked with BLOCK_SHADOW_MASK (1GB on 64-bit, folding the kernel and uncached mirrors; 256MB on 32-bit, iOS and Switch, where address space is short), with the low bits cleared so a misaligned PC can't read across two entries. Only the ranges under memory views are committed, so a bad PC still faults in the dispatcher, and the shadow is reserved before the memory map so it can't land in a gap of the 4GB window. Entries hold full 32-bit offsets, lifting the 16MB limit. The dispatchers on every backend, and the IR interpreter's loop, look blocks up there. A hooked instruction without a compiled block gets the JIT's hook value in its entry: the offset of the dispatcher's compile path (1 for the interpreters, the IR arena keeping that offset empty), so dispatching there compiles a block, and the frontends substitute the hook. Compiling replaces the entry with the block's, and destroying the block puts the hook value back. The hook value is rewritten when the JIT changes or regenerates its dispatcher. Hooks live in a map keyed by the masked address, and are dropped when the game overwrites the hooked instruction, or when an icache invalidation finds the function's hash (immediates masked, as when matching it) changed. Those checks run when queued invalidations are processed, since cheats and the debugger queue them before writing. Installing and removing hooks invalidates deferred, as it happens in HLE calls that can run inside a block. The cache instruction goes through MIPSState, so it drops changed hooks too. With clean memory, the save/clear/restore around savestates, memory reads and dumps goes away, as do the source-range invalidations in the memcpy replacements, sceDmac and the cheats. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
289 lines
9.0 KiB
C++
289 lines
9.0 KiB
C++
// Copyright (c) 2023- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ppsspp_config.h"
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// In other words, PPSSPP_ARCH(ARM64) || DISASM_ALL.
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#if PPSSPP_ARCH(ARM64) || (PPSSPP_PLATFORM(WINDOWS) && !defined(__LIBRETRO__))
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#include "Common/Log.h"
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#include "Core/CoreTiming.h"
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#include "Core/MemMap.h"
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#include "Core/MIPS/ARM64/Arm64IRJit.h"
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#include "Core/MIPS/ARM64/Arm64IRRegCache.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/Core.h"
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namespace MIPSComp {
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using namespace Arm64Gen;
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using namespace Arm64IRJitConstants;
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static const bool enableDebug = false;
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static const bool enableDisasm = false;
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static void ShowPC(void *membase, void *jitbase) {
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static int count = 0;
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if (currentMIPS) {
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u32 downcount = currentMIPS->downcount;
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ERROR_LOG(Log::JIT, "[%08x] ShowPC Downcount : %08x %d %p %p", currentMIPS->pc, downcount, count, membase, jitbase);
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} else {
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ERROR_LOG(Log::JIT, "Universe corrupt?");
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}
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//if (count > 2000)
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// exit(0);
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count++;
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}
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void Arm64JitBackend::GenerateFixedCode(MIPSState *mipsState) {
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// This will be used as a writable scratch area, always 32-bit accessible.
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const u8 *start = AlignCodePage();
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if (DebugProfilerEnabled()) {
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ProtectMemoryPages(start, GetMemoryProtectPageSize(), MEM_PROT_READ | MEM_PROT_WRITE);
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hooks_.profilerPC = (uint32_t *)GetWritableCodePtr();
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Write32(0);
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hooks_.profilerStatus = (IRProfilerStatus *)GetWritableCodePtr();
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Write32(0);
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}
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const u8 *disasmStart = AlignCodePage();
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BeginWrite(GetMemoryProtectPageSize());
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if (jo.useStaticAlloc) {
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saveStaticRegisters_ = AlignCode16();
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STR(INDEX_UNSIGNED, DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));
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regs_.EmitSaveStaticRegisters();
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RET();
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loadStaticRegisters_ = AlignCode16();
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regs_.EmitLoadStaticRegisters();
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LDR(INDEX_UNSIGNED, DOWNCOUNTREG, CTXREG, offsetof(MIPSState, downcount));
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RET();
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} else {
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saveStaticRegisters_ = nullptr;
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loadStaticRegisters_ = nullptr;
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}
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restoreRoundingMode_ = AlignCode16();
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{
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MRS(SCRATCH2_64, FIELD_FPCR);
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// We are not in flush-to-zero mode outside the JIT, so let's turn it off.
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uint32_t mask = ~(4 << 22);
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// Assume we're always in round-to-nearest mode beforehand.
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mask &= ~(3 << 22);
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ANDI2R(SCRATCH2, SCRATCH2, mask);
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_MSR(FIELD_FPCR, SCRATCH2_64);
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RET();
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}
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applyRoundingMode_ = AlignCode16();
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{
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LDR(INDEX_UNSIGNED, SCRATCH1, CTXREG, offsetof(MIPSState, fcr31));
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ANDI2R(SCRATCH2, SCRATCH1, 3);
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FixupBranch skip1 = TBZ(SCRATCH1, 24);
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ADDI2R(SCRATCH2, SCRATCH2, 4);
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SetJumpTarget(skip1);
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// We can skip if the rounding mode is nearest (0) and flush is not set.
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// (as restoreRoundingMode cleared it out anyway)
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FixupBranch skip = CBZ(SCRATCH2);
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// MIPS Rounding Mode: ARM Rounding Mode
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// 0: Round nearest 0
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// 1: Round to zero 3
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// 2: Round up (ceil) 1
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// 3: Round down (floor) 2
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ANDI2R(SCRATCH1, SCRATCH2, 3);
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CMPI2R(SCRATCH1, 1);
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FixupBranch skipadd = B(CC_NEQ);
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ADDI2R(SCRATCH2, SCRATCH2, 2);
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SetJumpTarget(skipadd);
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FixupBranch skipsub = B(CC_LE);
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SUBI2R(SCRATCH2, SCRATCH2, 1);
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SetJumpTarget(skipsub);
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// Actually change the system FPCR register
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MRS(SCRATCH1_64, FIELD_FPCR);
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// Clear both flush-to-zero and rounding before re-setting them.
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ANDI2R(SCRATCH1, SCRATCH1, ~((4 | 3) << 22));
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ORR(SCRATCH1, SCRATCH1, SCRATCH2, ArithOption(SCRATCH2, ST_LSL, 22));
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_MSR(FIELD_FPCR, SCRATCH1_64);
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SetJumpTarget(skip);
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RET();
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}
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updateRoundingMode_ = AlignCode16();
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{
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LDR(INDEX_UNSIGNED, SCRATCH1, CTXREG, offsetof(MIPSState, fcr31));
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// Set SCRATCH2 to FZ:RM (FZ is bit 24, and RM are lowest 2 bits.)
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ANDI2R(SCRATCH2, SCRATCH1, 3);
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FixupBranch skip = TBZ(SCRATCH1, 24);
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ADDI2R(SCRATCH2, SCRATCH2, 4);
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SetJumpTarget(skip);
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// Update currentRoundingFunc_ with the right convertS0ToSCRATCH1_ func.
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MOVP2R(SCRATCH1_64, convertS0ToSCRATCH1_);
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LSL(SCRATCH2, SCRATCH2, 3);
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LDR(SCRATCH2_64, SCRATCH1_64, SCRATCH2);
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MOVP2R(SCRATCH1_64, ¤tRoundingFunc_);
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STR(INDEX_UNSIGNED, SCRATCH2_64, SCRATCH1_64, 0);
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RET();
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}
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hooks_.enterDispatcher = (IRNativeFuncNoArg)AlignCode16();
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uint32_t regs_to_save = Arm64Gen::ALL_CALLEE_SAVED;
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uint32_t regs_to_save_fp = Arm64Gen::ALL_CALLEE_SAVED_FP;
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fp_.ABI_PushRegisters(regs_to_save, regs_to_save_fp);
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// Fixed registers, these are always kept when in Jit context.
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MOVP2R(MEMBASEREG, Memory::base);
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MOVP2R(CTXREG, mipsState);
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MOVP2R(JITBASEREG, GetBasePtr());
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LoadStaticRegisters();
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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MovFromPC(SCRATCH1);
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WriteDebugPC(SCRATCH1);
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outerLoopPCInSCRATCH1_ = GetCodePtr();
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MovToPC(SCRATCH1);
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outerLoop_ = GetCodePtr();
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SaveStaticRegisters(); // Advance can change the downcount, so must save/restore
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RestoreRoundingMode(true);
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WriteDebugProfilerStatus(IRProfilerStatus::TIMER_ADVANCE);
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QuickCallFunctionR(SCRATCH1_64, &CoreTiming::Advance, CTXREG);
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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ApplyRoundingMode(true);
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LoadStaticRegisters();
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dispatcherCheckCoreState_ = GetCodePtr();
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MOVP2R(SCRATCH1_64, &coreState);
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LDR(INDEX_UNSIGNED, SCRATCH1, SCRATCH1_64, 0);
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FixupBranch badCoreState = CBNZ(SCRATCH1);
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// Check downcount.
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TBNZ(DOWNCOUNTREG, 31, outerLoop_);
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FixupBranch skipToRealDispatch = B();
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dispatcherPCInSCRATCH1_ = GetCodePtr();
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MovToPC(SCRATCH1);
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hooks_.dispatcher = GetCodePtr();
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FixupBranch bail = TBNZ(DOWNCOUNTREG, 31);
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SetJumpTarget(skipToRealDispatch);
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dispatcherNoCheck_ = GetCodePtr();
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// Debug
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if (enableDebug) {
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MOV(W0, DOWNCOUNTREG);
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MOV(X1, MEMBASEREG);
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MOV(X2, JITBASEREG);
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QuickCallFunction(SCRATCH1_64, &ShowPC);
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}
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MovFromPC(SCRATCH1);
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WriteDebugPC(SCRATCH1);
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ANDI2R(SCRATCH1, SCRATCH1, Memory::BLOCK_SHADOW_ENTRY_MASK);
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MOVP2R(SCRATCH2_64, Memory::blockShadow);
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hooks_.dispatchFetch = GetCodePtr();
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LDR(SCRATCH1, SCRATCH2_64, SCRATCH1_64);
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// The entry is the block's offset into the code space, or 0 for none.
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FixupBranch skipJump = CBZ(SCRATCH1);
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ADD(SCRATCH1_64, JITBASEREG, SCRATCH1_64);
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BR(SCRATCH1_64);
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SetJumpTarget(skipJump);
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// No block found, let's jit. We don't need to save static regs, they're all callee saved.
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// A replacement hook's block shadow entry jumps here too (GetBlockShadowHookValue()). JitAt
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// replaces it with the new block's entry, and destroying that block puts the hook value back.
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hooks_.blockShadowHook = GetCodePtr();
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RestoreRoundingMode(true);
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WriteDebugProfilerStatus(IRProfilerStatus::COMPILING);
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QuickCallFunctionR(SCRATCH1_64, &MIPSComp::JitAt, CTXREG);
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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ApplyRoundingMode(true);
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// Let's just dispatch again, we'll enter the block since we know it's there.
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B(dispatcherNoCheck_);
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SetJumpTarget(bail);
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MOVP2R(SCRATCH1_64, &coreState);
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LDR(INDEX_UNSIGNED, SCRATCH1, SCRATCH1_64, 0);
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CBZ(SCRATCH1, outerLoop_);
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const uint8_t *quitLoop = GetCodePtr();
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SetJumpTarget(badCoreState);
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WriteDebugProfilerStatus(IRProfilerStatus::NOT_RUNNING);
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SaveStaticRegisters();
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RestoreRoundingMode(true);
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fp_.ABI_PopRegisters(regs_to_save, regs_to_save_fp);
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RET();
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hooks_.crashHandler = GetCodePtr();
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MOVP2R(SCRATCH1_64, &coreState);
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MOVI2R(SCRATCH2, CORE_RUNTIME_ERROR);
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STR(INDEX_UNSIGNED, SCRATCH2, SCRATCH1_64, 0);
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B(quitLoop);
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// Generate some integer conversion funcs.
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// MIPS order!
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static const RoundingMode roundModes[8] = { ROUND_N, ROUND_Z, ROUND_P, ROUND_M, ROUND_N, ROUND_Z, ROUND_P, ROUND_M };
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for (size_t i = 0; i < ARRAY_SIZE(roundModes); ++i) {
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convertS0ToSCRATCH1_[i] = AlignCode16();
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// Invert 0x80000000 -> 0x7FFFFFFF for the NAN result.
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fp_.MVNI(32, EncodeRegToDouble(SCRATCHF2), 0x80, 24);
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fp_.FCMP(S0, S0); // Detect NaN
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fp_.FCVTS(S0, S0, roundModes[i]);
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fp_.FCSEL(S0, S0, SCRATCHF2, CC_VC);
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RET();
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}
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// Leave this at the end, add more stuff above.
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if (enableDisasm) {
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std::vector<std::string> lines = DisassembleArm64(disasmStart, (int)(GetCodePtr() - disasmStart));
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for (auto s : lines) {
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INFO_LOG(Log::JIT, "%s", s.c_str());
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}
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}
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// Let's spare the pre-generated code from unprotect-reprotect.
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AlignCodePage();
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jitStartOffset_ = (int)(GetCodePtr() - start);
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// Don't forget to zap the instruction cache! This must stay at the end of this function.
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FlushIcache();
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EndWrite();
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// Update our current cached rounding mode func, too.
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UpdateFCR31(mipsState);
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}
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} // namespace MIPSComp
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#endif
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