Henrik RydgårdandClaude Fable 5.1 7d69ba76f2 x64 IR JIT: fix vcmp EN/NN, NI and TR ...

EN/NN compared the source against an uninitialized temp, usually the
previous lane's all-ones mask (a NaN), so every lane came out as NaN. NI
used a less-than compare, which is false for a NaN. TR set the bit and
then replaced it with a garbage bit from the temp. Found by
cpu/vfpu/specials.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>

2026-09-22 14:10:22 -06:00

..

Asm.cpp

Add a MIPSState context pointer to the JitAt call

2026-09-21 17:34:10 -06:00

CompALU.cpp

MIPS: INT_MIN / -1 leaves HI at zero, like the hardware

2026-09-22 11:02:20 -06:00

CompBranch.cpp

Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.

2026-08-15 19:14:13 +02:00

CompFPU.cpp

Implement MMIO for the JIT (by falling back to the interpreter for load/stores from kernel addresses)

2026-08-25 00:22:40 +02:00

CompLoadStore.cpp

Implement MMIO for the JIT (by falling back to the interpreter for load/stores from kernel addresses)

2026-08-25 00:22:40 +02:00

CompReplace.cpp

Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11

2017-08-31 01:14:51 +02:00

CompVFPU.cpp

VFPU: vsgn of a denormal is zero

2026-09-22 14:10:22 -06:00

Jit.cpp

Move the temporary breakpoint out of the user's breakpoint list

2026-08-17 00:29:26 +02:00

Jit.h

Expose some more pointers in the ImDebugger UI

2026-02-17 22:40:00 +01:00

JitSafeMem.cpp

More memory access cleanup

2026-08-11 20:14:01 +02:00

JitSafeMem.h

x86jit: Simplify memcheck handling.

2023-04-12 01:07:48 -07:00

RegCache.cpp

Remove more vestiges of old experiments

2026-02-12 01:23:48 +01:00

RegCache.h

Remove more vestiges of old experiments

2026-02-12 01:23:48 +01:00

RegCacheFPU.cpp

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

RegCacheFPU.h

Make instruction cache invalidation (for us, jit cache invalidation) clearer

2026-08-16 16:59:52 +02:00

X64IRAsm.cpp

Add a MIPSState context pointer to the JitAt call

2026-09-21 17:34:10 -06:00

X64IRCompALU.cpp

MIPS: INT_MIN / -1 leaves HI at zero, like the hardware

2026-09-22 11:02:20 -06:00

X64IRCompBranch.cpp

x86jit: Implement syscalls and some system.

2023-08-25 00:01:02 -07:00

X64IRCompFPU.cpp

x64 IR JIT: fix vcmp EN/NN, NI and TR

2026-09-22 14:10:22 -06:00

X64IRCompLoadStore.cpp

irjit: Fix safety of kernel bit memory addresses.

2023-09-24 10:18:55 -07:00

X64IRCompSystem.cpp

Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.

2026-08-15 19:14:13 +02:00

X64IRCompVec.cpp

x86jit: Use a literal pool to avoid rip checks.

2023-08-28 23:11:46 -07:00

X64IRJit.cpp

Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers

2026-08-12 14:02:19 +02:00

X64IRJit.h

JIT/IRJit: Delete an old "function preloading" experiment

2025-06-11 15:45:18 +02:00

X64IRRegCache.cpp

Warning fixes

2024-10-03 18:19:11 +02:00

X64IRRegCache.h

x86jit: Cleanup and refactor transfer.

2023-09-24 16:58:41 -07:00