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The backend follows the ARM64 one: a dispatcher, a register cache on top of the IR one, and native exits, syscalls, breakpoints and transfers. Everything else goes to the IR interpreter for now. Floats are mapped one lane per S register (no SIMD mapping yet), and addresses are masked, as on every 32-bit build. The JIT core now uses it on ARM32 in place of the old ArmJit. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
224 lines
7.0 KiB
C++
224 lines
7.0 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ppsspp_config.h"
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#if PPSSPP_ARCH(ARM)
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#include "Common/Log.h"
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#include "Common/MemoryUtil.h"
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#include "Core/CoreTiming.h"
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#include "Core/MemMap.h"
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#include "Core/MIPS/ARM/ArmIRJit.h"
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#include "Core/MIPS/ARM/ArmIRRegCache.h"
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#include "Core/MIPS/JitCommon/JitCommon.h"
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#include "Core/MIPS/JitCommon/JitState.h"
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#include "Core/Core.h"
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std::vector<std::string> DisassembleArm2(const u8 *data, int size);
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namespace MIPSComp {
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using namespace ArmGen;
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using namespace ArmIRJitConstants;
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static const bool enableDisasm = false;
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void ArmJitBackend::GenerateFixedCode(MIPSState *mipsState) {
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// This will be used as a writable scratch area, always 32-bit accessible.
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const u8 *start = AlignCodePage();
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if (DebugProfilerEnabled()) {
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ProtectMemoryPages(start, GetMemoryProtectPageSize(), MEM_PROT_READ | MEM_PROT_WRITE);
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hooks_.profilerPC = (uint32_t *)GetWritableCodePtr();
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Write32(0);
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hooks_.profilerStatus = (IRProfilerStatus *)GetWritableCodePtr();
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Write32(0);
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}
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const u8 *disasmStart = AlignCodePage();
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BeginWrite(GetMemoryProtectPageSize());
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// These are called with BL, so LR has to survive.
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restoreRoundingMode_ = AlignCode16();
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{
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VMRS(SCRATCH2);
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// Outside the JIT we run with round-to-nearest and flush-to-zero off.
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BIC(SCRATCH2, SCRATCH2, AssumeMakeOperand2((3 | 4) << 22));
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VMSR(SCRATCH2);
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B(R_LR);
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}
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// Must preserve SCRATCH1, since it may hold the PC. Destroys SCRATCH2 and R12.
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applyRoundingMode_ = AlignCode16();
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{
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LDR(SCRATCH2, CTXREG, offsetof(MIPSState, fcr31));
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TST(SCRATCH2, AssumeMakeOperand2(1 << 24));
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AND(SCRATCH2, SCRATCH2, Operand2(3));
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SetCC(CC_NEQ);
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ADD(SCRATCH2, SCRATCH2, Operand2(4));
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SetCC(CC_AL);
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// We can skip if the rounding mode is nearest (0) and flush is not set.
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// (as restoreRoundingMode cleared it out anyway)
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CMP(SCRATCH2, Operand2(0));
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FixupBranch skip = B_CC(CC_EQ);
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// MIPS Rounding Mode: ARM Rounding Mode
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// 0: Round nearest 0
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// 1: Round to zero 3
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// 2: Round up (ceil) 1
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// 3: Round down (floor) 2
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AND(R12, SCRATCH2, Operand2(3));
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CMP(R12, Operand2(1));
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SetCC(CC_EQ); ADD(SCRATCH2, SCRATCH2, Operand2(2));
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SetCC(CC_GT); SUB(SCRATCH2, SCRATCH2, Operand2(1));
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SetCC(CC_AL);
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VMRS(R12);
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// Assume we're always in round-to-nearest mode beforehand.
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// But we need to clear flush to zero in this case anyway.
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BIC(R12, R12, AssumeMakeOperand2((3 | 4) << 22));
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ORR(R12, R12, Operand2(SCRATCH2, ST_LSL, 22));
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VMSR(R12);
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SetJumpTarget(skip);
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B(R_LR);
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}
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hooks_.enterDispatcher = (IRNativeFuncNoArg)AlignCode16();
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// Nine registers, so we're misaligned by 4 for calls, which the SUB fixes.
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PUSH(9, R4, R5, R6, R7, R8, R9, R10, R11, R_LR);
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SUB(R_SP, R_SP, 4);
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VPUSH(D8, 8);
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// Fixed registers, these are always kept when in Jit context.
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MOVP2R(MEMBASEREG, Memory::base);
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MOVP2R(CTXREG, mipsState);
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LoadStaticRegisters();
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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MovFromPC(SCRATCH1);
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WriteDebugPC(SCRATCH1);
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outerLoopPCInSCRATCH1_ = GetCodePtr();
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MovToPC(SCRATCH1);
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outerLoop_ = GetCodePtr();
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SaveStaticRegisters(); // Advance can change the downcount, so must save/restore
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RestoreRoundingMode(true);
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WriteDebugProfilerStatus(IRProfilerStatus::TIMER_ADVANCE);
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QuickCallFunctionR(R12, &CoreTiming::Advance, CTXREG);
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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ApplyRoundingMode(true);
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LoadStaticRegisters();
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dispatcherCheckCoreState_ = GetCodePtr();
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MOVP2R(SCRATCH1, &coreState);
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LDR(SCRATCH1, SCRATCH1, 0);
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CMP(SCRATCH1, Operand2(0));
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FixupBranch badCoreState = B_CC(CC_NEQ);
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// Check downcount.
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CMP(DOWNCOUNTREG, Operand2(0));
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B_CC(CC_MI, outerLoop_);
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FixupBranch skipToRealDispatch = B();
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dispatcherPCInSCRATCH1_ = GetCodePtr();
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MovToPC(SCRATCH1);
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hooks_.dispatcher = GetCodePtr();
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CMP(DOWNCOUNTREG, Operand2(0));
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FixupBranch bail = B_CC(CC_MI);
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SetJumpTarget(skipToRealDispatch);
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dispatcherNoCheck_ = GetCodePtr();
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MovFromPC(SCRATCH1);
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WriteDebugPC(SCRATCH1);
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static_assert(Memory::BLOCK_SHADOW_ENTRY_MASK == 0x0FFFFFFC, "BICs below assume the 32-bit shadow mask");
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BIC(SCRATCH1, SCRATCH1, Operand2(0xF0, 4)); // &= 0x0FFFFFFF. Rotation is to the right, in 2-bit increments.
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BIC(SCRATCH1, SCRATCH1, Operand2(3));
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MOVP2R(SCRATCH2, Memory::blockShadow);
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hooks_.dispatchFetch = GetCodePtr();
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LDR(SCRATCH1, SCRATCH2, SCRATCH1);
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// The entry is the block's offset into the code space, or 0 for none.
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CMP(SCRATCH1, Operand2(0));
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FixupBranch noBlock = B_CC(CC_EQ);
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MOVP2R(SCRATCH2, GetBasePtr());
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ADD(SCRATCH1, SCRATCH1, SCRATCH2);
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B(SCRATCH1);
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SetJumpTarget(noBlock);
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// No block found, let's jit. We don't need to save static regs, they're all callee saved.
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// A replacement hook's block shadow entry jumps here too (GetBlockShadowHookValue()). JitAt
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// replaces it with the new block's entry, and destroying that block puts the hook value back.
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hooks_.blockShadowHook = GetCodePtr();
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RestoreRoundingMode(true);
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WriteDebugProfilerStatus(IRProfilerStatus::COMPILING);
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QuickCallFunctionR(R12, &MIPSComp::JitAt, CTXREG);
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WriteDebugProfilerStatus(IRProfilerStatus::IN_JIT);
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ApplyRoundingMode(true);
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// Let's just dispatch again, we'll enter the block since we know it's there.
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B(dispatcherNoCheck_);
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SetJumpTarget(bail);
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MOVP2R(SCRATCH1, &coreState);
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LDR(SCRATCH1, SCRATCH1, 0);
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CMP(SCRATCH1, Operand2(0));
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B_CC(CC_EQ, outerLoop_);
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const uint8_t *quitLoop = GetCodePtr();
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SetJumpTarget(badCoreState);
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WriteDebugProfilerStatus(IRProfilerStatus::NOT_RUNNING);
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SaveStaticRegisters();
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RestoreRoundingMode(true);
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VPOP(D8, 8);
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ADD(R_SP, R_SP, 4);
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POP(9, R4, R5, R6, R7, R8, R9, R10, R11, R_PC); // Returns
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hooks_.crashHandler = GetCodePtr();
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MOVP2R(SCRATCH1, &coreState);
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MOVI2R(SCRATCH2, CORE_RUNTIME_ERROR);
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STR(SCRATCH2, SCRATCH1, 0);
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B(quitLoop);
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// Leave this at the end, add more stuff above.
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if (enableDisasm) {
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std::vector<std::string> lines = DisassembleArm2(disasmStart, (int)(GetCodePtr() - disasmStart));
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for (auto s : lines) {
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INFO_LOG(Log::JIT, "%s", s.c_str());
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}
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}
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// Let's spare the pre-generated code from unprotect-reprotect.
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AlignCodePage();
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jitStartOffset_ = (int)(GetCodePtr() - start);
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// Don't forget to zap the instruction cache! This must stay at the end of this function.
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FlushIcache();
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EndWrite();
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}
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} // namespace MIPSComp
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#endif
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