Henrik RydgårdandClaude Opus 5.5 9de0f6e45d bltzal and friends test rs from before they link ...

As on hardware (cpu/cpu_alu/branch_link_ra), with ra as rs the branch
sees its old value, not the return address. Every core linked first.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

2026-10-15 09:55:35 +02:00

..

IRAnalysis.cpp

IR: Fix PurgeTemps miscompiles

2026-09-24 16:35:11 -06:00

IRAnalysis.h

irjit: Cache IR metadata lookups.

2023-09-30 15:56:53 -07:00

IRCompALU.cpp

Decode the unused bits of shifts and Allegrex bit ops as the PSP does

2026-10-14 10:56:48 +02:00

IRCompBranch.cpp

bltzal and friends test rs from before they link

2026-10-15 09:55:35 +02:00

IRCompFPU.cpp

Drop unused Config.h and SmallDataConvert.h includes

2026-10-13 12:13:42 +02:00

IRCompLoadStore.cpp

Drop unused Config.h and SmallDataConvert.h includes

2026-10-13 12:13:42 +02:00

IRCompVFPU.cpp

IR: vmtvc to a masked control register reads vs

2026-10-15 09:55:35 +02:00

IRFrontend.cpp

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

IRFrontend.h

IR: Add Vec4VfpuDot, the VFPU's own dot product, and use it with AccurateVdot

2026-10-14 22:30:36 +02:00

IRInst.cpp

IR: Add Vec4VfpuDot, the VFPU's own dot product, and use it with AccurateVdot

2026-10-14 22:30:36 +02:00

IRInst.h

IR: Add Vec4VfpuDot, the VFPU's own dot product, and use it with AccurateVdot

2026-10-14 22:30:36 +02:00

IRInterpreter.cpp

IR: Add Vec4VfpuDot, the VFPU's own dot product, and use it with AccurateVdot

2026-10-14 22:30:36 +02:00

IRInterpreter.h

Interpreter: honor the guest's FPU rounding mode and flush-to-zero

2026-08-27 16:43:06 +02:00

IRJit.cpp

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

IRJit.h

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

IRNativeCommon.cpp

ARM64 IR JIT: Run Vec4VfpuDot through a shared routine

2026-10-14 22:30:36 +02:00

IRNativeCommon.h

Remove FakeJit and the pre-IR JitBlockCache

2026-10-15 02:24:25 +02:00

IRPassSimplify.cpp

IR: Keep d in vcmov's lanes that don't move under a D prefix

2026-10-15 09:55:35 +02:00

IRPassSimplify.h

Add new IR optimization pass, OptimizeLoadsAfterStores

2024-06-07 19:32:37 +02:00

IRRegCache.cpp

IR JITs: Flushing a host register that holds zero unmaps it

2026-10-15 09:55:35 +02:00

IRRegCache.h

IR JIT: Don't store dead temps at exits

2026-09-24 16:38:39 -06:00