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ppsspp/Core
Henrik RydgårdandClaude Opus 5.5 108e66f2d1 IR: Vec4 vmin, vmax, vslt, vsge and vi2f
New IR ops do them four lanes at a time where the backend has them, the
ARM64 JIT and the IR interpreter so far. vmin and vmax compare by
vfpu_minmax_key() in NEON, which took about twelve instructions a lane
through the integer registers before; vslt and vsge are a compare and an
AND with 1.0.

vi2f becomes one SCVTF with fractional bits.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-15 11:02:17 +02:00
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2026-10-14 22:30:37 +02:00
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2026-08-11 15:43:48 +02:00
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