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Author SHA1 Message Date
Henrik Rydgård fa558b5b71 Merge pull request #17813 from unknownbrackets/riscv-jit-fixes 
Fix some typos and mistakes in RISC-V jit
 2023-07-30 23:41:13 +02:00
Henrik Rydgård 100f7c838e Merge pull request #17812 from unknownbrackets/irjit-floats 
Cleanup IR cond move flag, fmov to self
 2023-07-30 23:36:37 +02:00
Unknown W. Brackets 5ef4b2b5fa riscv: Fix assert when flushing not mapped reg. 2023-07-30 14:19:28 -07:00
Unknown W. Brackets 9f917488c3 riscv: Fix PC in disassembly. 2023-07-30 14:19:28 -07:00
Unknown W. Brackets e34736fbb2 riscv: Reduce norms in Slt/Sltu overlap cases. 
We can skip an SEXT.W in common cases where the dest and src overlap.
 2023-07-30 14:19:28 -07:00
Unknown W. Brackets d1dc346899 riscv: Fix pointer add/sub. 2023-07-30 14:19:28 -07:00
Unknown W. Brackets 09f3842a32 riscv: Fix VFPU compare typos. 2023-07-30 14:19:28 -07:00
Unknown W. Brackets f3240393fa irjit: Use vf for vfpu regs, v0 is a gpr. 2023-07-30 14:16:17 -07:00
Unknown W. Brackets 6819acd29f irjit: Fix flag on float cond move. 2023-07-30 14:16:17 -07:00
Unknown W. Brackets 5db6b11ef2 irjit: Cleanup self-fmovs. 
These were sometimes getting emitted.
 2023-07-30 14:16:17 -07:00
Henrik Rydgård 4c560e44b5 Merge pull request #17810 from hrydgard/bbox-cache-planes 
Cache computed planes used for BBOX culling
 2023-07-30 19:34:00 +02:00
Henrik Rydgård f0fd9e85aa Try dirtying CULL_PLANES in Execute_BoundingBox in SoftGPU 2023-07-30 18:35:18 +02:00
Henrik Rydgård fd656c629d More dirtying 2023-07-30 17:45:19 +02:00
Unknown W. Brackets a28acf2662 Merge pull request #17805 from hch12907/sdl-ttf 
SDL: address comments on #17780
 2023-07-30 07:10:59 -07:00
Henrik Rydgård 061131ec8a Cache planes used for BBOX culling 
This isn't a huge performance boost for the games that use BBOX (like
Tekken), but it'll be more valuable if we start using soft culling more
widely automatically, see #17808
 2023-07-30 14:42:22 +02:00
Henrik Rydgård 36951a0b98 Merge pull request #17806 from hrydgard/update-rcheevos 
Update to the latest version of rcheevos.
 2023-07-30 12:19:40 +02:00
Henrik Rydgård 1c05f71b50 Update to the latest version of rcheevos. 2023-07-30 11:58:55 +02:00
Henrik Rydgård 47bbddad0f Merge pull request #17807 from hrydgard/re-enable-framebuffer-fetch 
Re-enable framebuffer fetch for blend where available.
 2023-07-30 11:37:20 +02:00
Henrik Rydgård 6da6de8201 Re-enable framebuffer fetch for blend where available. 
Accidentally disabled this in #17575

Helps #17797 but only on OpenGL on mobile. There's more to improve
there.

caps_.framebufferFetchSupported is now always set to false in Vulkan.
 2023-07-30 11:13:42 +02:00
Hoe Hao Cheng c56f302e51 SDL: address comments on #17780 2023-07-30 16:25:36 +08:00
Henrik Rydgård c20f508db2 Merge pull request #17804 from unknownbrackets/riscv-jit 
A couple more RISC-V ops
 2023-07-30 10:23:13 +02:00
Unknown W. Brackets c24e3ef831 riscv: Implement ll/sc. 2023-07-30 00:45:51 -07:00
Unknown W. Brackets 26a527bdf8 riscv: Implement float/int conversion. 2023-07-30 00:45:51 -07:00
Henrik Rydgård b93275bb35 Merge pull request #17800 from unknownbrackets/riscv-jit 
More RISC-V jit ops
 2023-07-30 09:26:22 +02:00
Henrik Rydgård c8447ff4b7 Merge pull request #17801 from unknownbrackets/irjit-vminmax 
irjit: Fix vmin/vmax nan handling
 2023-07-30 09:18:25 +02:00
Henrik Rydgård 180bda6f6b Merge pull request #17799 from unknownbrackets/irjit-lsu 
Add ll/sc to IR and x86jit
 2023-07-30 09:15:55 +02:00
Henrik Rydgård f5c7e6c937 Merge pull request #17802 from HR1025/win 
some small change
 2023-07-30 09:09:15 +02:00
Henrik Rydgård 52cefeb5c3 Merge pull request #17798 from unknownbrackets/irjit-vf2ix 
irjit: Implement vf2ix
 2023-07-30 09:08:45 +02:00
Henrik Rydgård 88bef1b00f Merge pull request #17803 from Narugakuruga/patch-24 
Update zh_CN.ini
 2023-07-30 09:06:45 +02:00
Unknown W. Brackets 0036f3c494 riscv: Implement FMin/FMax. 2023-07-30 00:02:10 -07:00
Unknown W. Brackets 8e8081c686 riscv: Implement VFPU compares. 2023-07-30 00:02:10 -07:00
Unknown W. Brackets 9c9330a207 riscv: Implement float conditional move. 2023-07-30 00:02:10 -07:00
Unknown W. Brackets 70ff18a463 riscv: Implement count leading zeros. 2023-07-30 00:02:10 -07:00
Unknown W. Brackets a5671bc716 riscv: Add simple debug log of missed ops. 2023-07-30 00:02:10 -07:00
Narugakuruga 99d5a90898 Update zh_CN.ini 2023-07-30 14:23:21 +08:00
haorui wang ec4927069e 1. remove some unused code 
2. add some missing header
3. fix error address offset operation
 2023-07-30 12:31:31 +08:00
Unknown W. Brackets 6aa4b0c5e1 irjit: Fix vmin/vmax nan handling. 
Should be relevant to NFS MW and possibly other game bugs.
 2023-07-29 19:13:12 -07:00
Unknown W. Brackets 6d4fb949c2 riscv: Implement float compare ops. 2023-07-29 19:02:15 -07:00
Unknown W. Brackets 6b632a103d riscv: Implement FSin/similar. 2023-07-29 19:02:15 -07:00
Unknown W. Brackets 921bd2391c riscv: Implement vi2s. 2023-07-29 19:02:15 -07:00
Unknown W. Brackets e2765db4dc riscv: Implement division. 2023-07-29 19:02:15 -07:00
Unknown W. Brackets f65b6fdb20 riscv: Remove incomplete block check. 
It shouldn't be necessary and bad things would happen anyway if it did.
 2023-07-29 19:02:15 -07:00
Unknown W. Brackets 8d60c10a64 riscv: Use jit address offsets directly. 
We'll have IR able to use block number or target offset.
 2023-07-29 19:02:15 -07:00
Unknown W. Brackets b6d2e64aca Debugger: Fix disasm of ll/sc. 2023-07-29 18:50:09 -07:00
Unknown W. Brackets 9a8ac1fe08 x86jit: Implement ll/sc. 
The point here is that breakpoints now work for ll and sc.
 2023-07-29 18:49:45 -07:00
Unknown W. Brackets e228748449 irjit: Add FCvtScaledSW to safely scale vi2f. 2023-07-29 18:30:15 -07:00
Unknown W. Brackets a5a2671af3 irjit: Implement vf2ix. 
Used in LittleBigPlanet when playing intro movies.
 2023-07-29 18:01:08 -07:00
Unknown W. Brackets f0d4267c5e HLE: Reset ll/sc link on any syscall. 
This seems to happen from any syscall, which makes sense.
The bit isn't cleared on an sc, but a thread switch doesn't need to occur.
 2023-07-29 17:57:56 -07:00
Unknown W. Brackets df2462b1d9 irjit: Implement ll/sc. 
These occur more than I expected in LittleBigPlanet while loading.
 2023-07-29 17:57:44 -07:00
Unknown W. Brackets 48586ed0ad irjit: Combine Load32Left/Right even on unaligned. 
This helps on devices that don't allow unaligned load/store.
 2023-07-29 17:57:25 -07:00