Kingcom
ab1aa09dce
Expression parser
2013-06-29 15:17:00 +02:00
Kingcom
76f135e077
-edit register by double clicking
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-copy register with ctrl+c
2013-06-27 11:50:59 +02:00
Henrik Rydgard
cc414296d6
Merge branch 'master' of https://github.com/jtraynham/ppsspp into jtraynham-master
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Conflicts:
lang
pspautotests
2013-06-26 22:56:53 +02:00
Unknown W. Brackets
abe3d95877
Revert "Remove hack for BREAK in Sol Trigger"
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This reverts commit 3d2c3c7227
2013-06-26 07:56:36 -07:00
raven02
3d2c3c7227
Remove hack for BREAK in Sol Trigger
2013-06-26 19:27:36 +08:00
Kingcom
7d0e6ff199
-disassembly view redesigned
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-change the cursor with the mouse or with the keyboard
-displays symbols on the left and in opcode arguments
-press tab to toggle displaying of symbols
-click on the highlighted line to toggle a breakpoint at that position
-press right to follow a branch and left to go back a level
2013-06-25 23:52:56 +02:00
Jake Traynham
e89b2055a6
Reenabled armv7s for iOS with JIT fixes
2013-06-20 11:44:59 -05:00
Henrik Rydgard
ce2c18d2fe
Remove redundant vmov instructions (seen in wipeout)
2013-06-15 00:19:48 +02:00
Henrik Rydgard
e809e39681
Mips interpreter: Use unions instead of ugly casts. Strict-aliasing builds now work, but needs more testing so I don't enable it yet. Also some aliasing fixes for TransformPipeline.
2013-06-11 21:44:37 +02:00
Sacha
2450c0d28d
We can't use S2 or D1. Use alternative means.
2013-06-10 19:28:53 +10:00
Sacha
104a3a316b
Revert extra regs allocation. Causes some crashes with ffmpeg.
2013-06-10 00:29:08 +10:00
Sacha
637d75f47d
Unlock the other 16 regs that are available for NEON.
2013-06-09 23:15:59 +10:00
Sacha
583927988c
Armjit Update: Improvements
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Implement vsat0 and vsat1
Introduce VMOV for immediates. Use in MOVI2F where possible by detecting if float val can be encoded.
Combine some vneg ops in ApplyPrefixST.
2013-06-09 21:27:16 +10:00
Sacha
f21218c3f9
Armjit: Combine mul.s + neg.s to VNMUL. Implement VNMUL, VNMLA, VNMLS.
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I had implemented mul.s + add/sub.s + add/sub.s -> VADD/VSUB + V(N)ML(A/S). Turns out it doesn't happen enough though (once or twice per game).
2013-06-08 16:39:59 +10:00
Sacha
10c976b2af
Armjit: Improve ApplyPrefixD. Add VABD to emitter.
2013-06-06 03:08:58 +10:00
Sacha
a26b48fc0b
Stub wsbh/wsbw for x86.
2013-06-05 14:55:01 +10:00
Sacha
6712de1136
Armjit: Implement wsbh and wsbw (rev16 and rev). Fix encoding for rev16.
2013-06-05 11:32:44 +10:00
Unknown W. Brackets
a640ac4001
Bail out on a delay slot in VFPU on arm also.
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Otherwise we loop infinitely.
Workaround for #1926 . Should fix #1679 .
2013-06-03 00:06:24 -07:00
Unknown W. Brackets
2cd8f928a7
Just disable the this constructor warning here.
2013-05-31 23:14:27 -07:00
Unknown W. Brackets
1c923611e0
Fix a typo.
2013-05-27 00:16:22 -07:00
Henrik Rydgård
8e6c093eec
Merge pull request #1938 from unknownbrackets/symbol-map
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Symbol map fixes
2013-05-27 00:06:40 -07:00
Unknown W. Brackets
5595146f56
Add reporting for jumps in delay slots.
2013-05-26 20:30:14 -07:00
Unknown W. Brackets
1beb19f827
Clear the debug symbol map on shutdown.
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Instead of polluting the next game.
2013-05-26 16:29:21 -07:00
Unknown W. Brackets
44e20fb213
Correctly detect bltzal as func calls in debug.
2013-05-26 16:24:58 -07:00
Sacha
a14a2fafa9
ARMJIT: Fix and use DIV, DIVU, INS and EXT (ARMv7 and VFPv4 implementations).
2013-05-24 08:26:19 +10:00
Henrik Rydgard
5877929fe5
Add Mersenne Twister random number generator.
2013-05-20 00:57:45 +02:00
Henrik Rydgard
5218b4e9d8
Make vwbn and the other unimplemented vfpu ops increment PC. Add commented-out attempt at implementing vwbn.
2013-05-19 13:14:02 +02:00
Unknown W. Brackets
e3e5b24bf8
Prevent some warnings in vfpu, add reporting.
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Uninitialized value and out of bounds error.
2013-05-18 10:17:58 -07:00
Unknown W. Brackets
b733bc1a2a
Clean up some indents, add some reporting.
2013-05-18 02:09:32 -07:00
Unknown W. Brackets
e16514b50d
Avoid float copy in vfpu to workaround 32-bit bug.
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This appears to be an MSVC bug (or just precision issue) when using
fast math, only on 32-bit builds. Anyway, memcpy or u32 * fixes it.
Unfortunately, matrix ops have similar issues and memcpy doesn't seem
to help there.
2013-05-18 02:09:32 -07:00
Unknown W. Brackets
fcfcadaef2
Fix potential crash looking up block_num.
2013-04-28 20:59:13 -07:00
Henrik Rydgard
f20e00315d
Add basic support for the second analog stick present in the PS3 PSP emu for HD remakes.
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Make vi2f safer.
2013-04-28 22:15:33 +02:00
Henrik Rydgard
338bc0049d
Seems block linking got too slow, speed it up again.
2013-04-27 23:40:17 +02:00
Henrik Rydgard
b603214777
Also implement vcst in x86 jit
2013-04-27 22:00:09 +02:00
Henrik Rydgard
bac7e87125
Add support for vi2f to x86 JIT
2013-04-27 21:46:00 +02:00
Henrik Rydgard
1a1c161a0d
Implement vmin/vmax in x86 jit, slots right into VecDo3
2013-04-27 20:52:42 +02:00
Henrik Rydgard
7375706d2f
Crashfix
2013-04-27 20:50:12 +02:00
Henrik Rydgard
c5c3189436
Fix some framebuffer-related crash bugs. Ignore cache instruction 'FILL'.
2013-04-27 20:06:31 +02:00
Henrik Rydgard
6f4ad05582
Remove some unused code, add some stubs to vfpu jit, some cleanup
2013-04-27 19:35:42 +02:00
Henrik Rydgard
5ced57953d
Fix a bug caused by the recent JIT optimization : ignore destroyed blocks.
2013-04-27 18:33:56 +02:00
Henrik Rydgard
78fe42fe80
Buildfix
2013-04-27 12:04:42 +02:00
Henrik Rydgard
2a39a3b972
JIT: Get rid of one memory access per dispatch, and get rid of blockcodepointers.
2013-04-27 01:32:03 +02:00
Henrik Rydgard
9eace8a80e
Combine the two JitCache implementations (x86, ARM) into one.
2013-04-27 01:32:03 +02:00
Henrik Rydgard
8a904fe478
Some JIT cleanup
2013-04-27 01:32:02 +02:00
Unknown W. Brackets
3bb5651ca7
Initial x86 jit for vtfm/vhtfm.
2013-04-20 01:52:06 -07:00
Unknown W. Brackets
9245490b53
Initial / simple vmscl for x86 jit.
2013-04-20 01:34:16 -07:00
Unknown W. Brackets
29109d25af
Non-optimal vmmul for x86 jit.
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It's faster than interpreter anyway, but it could be much better.
2013-04-20 01:15:15 -07:00
Unknown W. Brackets
cfac7324d6
Implement vscl in the x86 jit.
2013-04-20 01:15:14 -07:00
aquanull
cfa029573c
Fix capping in vf2i
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A quick and rough skim lead me to this quick and lazy fix. In short , IEEE 754 single-precision float is not precise enough for storing every int32 value, and you need double for that ;)
BTW, should there be a default case for the switch ((op >> 21) & 0x1f) right following below or dsv could be uninitialized?
2013-04-19 18:16:45 +08:00
Unknown W. Brackets
1dd738f311
Fix wrong sign if vf2i/vi2f with max imm arg.
2013-04-19 00:32:07 -07:00
Kingcom