59 Commits

Include renames

Author	SHA1	Message	Date
Henrik Rydgard	91a6cf5e44	Add a couple more passes (2-op, optimize f<->v fp moves)	2016-05-13 20:14:03 +02:00
Henrik Rydgard	f636b2a315	Minor build and other fixes	2016-05-13 19:31:27 +02:00
Unknown W. Brackets	29ed8d2201	jit-ir: ExitToReg doesn't write to registers.	2016-05-12 18:34:27 -07:00
Unknown W. Brackets	99468c6fc1	jit-ir: Optimize out unused temp regs. ... This way, if constants have made the temp obsolete (common with ins, for example), it won't even get set anymore.	2016-05-12 18:30:53 -07:00
Henrik Rydgard	850d0abc91	IR: More VFPU. Support normal fp compares.	2016-05-12 20:16:15 +02:00
Henrik Rydgard	558bb197c7	More VFPU	2016-05-09 23:47:56 +02:00
Henrik Rydgard	a5d5c5ce2b	Do the voffset remapping before the IR. This will let us easily add some virtual VFPU registers for the IR to the end, plus it's slightly faster.	2016-05-09 22:40:59 +02:00
Henrik Rydgard	28087a6088	IRFrontend shouldn't know about IRBlock	2016-05-09 20:18:22 +02:00
Henrik Rydgard	e711a47a75	Complete the separation of the IR compiler frontend from the "Jit"	2016-05-09 20:05:06 +02:00