Commit Graph
268 Commits
Author SHA1 Message Date
Henrik RydgårdandClaude Fable 5.1 b16cd9a734 VFPU: vsgn of a denormal is zero
In the interpreter, the IR interpreter, every backend's FSign and the x86
JIT's own vsgn. Recorded in cpu/vfpu/specials.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-22 14:10:22 -06:00
Henrik RydgårdandClaude Fable 5.1 ed6d13e15f VFPU: bit-exact vh2f and vf2h
vf2h truncates the mantissa (no rounding), gives a signed zero below 2^-14
and a signed inf from 65536 up, and keeps the low ten mantissa bits of a
NaN, so one with those clear becomes inf. vh2f flushes a subnormal half to
a signed zero and keeps inf/NaN mantissa bits unshifted. The x86 JIT's own
vh2f gets the subnormal flush; the other backends go through the
interpreter. Recorded in cpu/vfpu/specials.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-22 14:10:22 -06:00
Henrik RydgårdandClaude Fable 5.1 9f003f7773 x86 JIT: Gate the VFPU ops with odd prefix rules the way the IR does, and mask mtvc
The same set of gates the arm64 JIT got: vabs/vneg, vsat1, the vrcp
group, vzero/vone/vidt, vdiv, vscl, vfad/vavg, vrot, vuc2i, and now also
vcrs/vcrsp/vqmul, vbfy and vtfm, which the IR frontend hands to the
interpreter as well. Swizzles naming a lane past the op's size go there
too. mtvc now keeps only the bits the hardware does (six for CC, the low
20 of a prefix, 0x3F8 on top of the RNG state). vcst's SIMD path skipped
the D prefix.

Fixes cpu/vfpu/prefix_ctrl on Windows CI. Verified on an x86_64 build
under Rosetta: prefix_ctrl and the full tests_good pass, prefix_consume
is down to the same three ops that differ on every backend.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
2026-09-22 12:49:06 -06:00
Henrik RydgårdandClaude Opus 5 315d128141 VFPU: make vmfvc see a pending prefix, and actually write its result
Comp_Vmfvc read vfpuCtrl[] straight from the context in all four
backends, while the mfvc path in Comp_Mftv flushes first, with the
comment "In case we have a saved prefix" - so "vpfxs X" followed by
"vmfvc sN, $128" returned the stale value in memory. The IR frontend
flushes only for the three prefix registers, which is the tighter form,
so vmfvc does the same there.

On ARM and ARM64 the fix alone wouldn't have been observable: those two
map the destination with no flags, leaving isDirty false, so the flush
dropped the loaded value without storing it. x86 already passes
MAP_DIRTY | MAP_NOINIT. That part is a fix of its own, but the two are
inseparable in this function - a vmfvc that reads the right value and
then throws it away is no better.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-21 11:32:24 -06:00
Henrik Rydgård a810597ac0 Implement MMIO for the JIT (by falling back to the interpreter for load/stores from kernel addresses)
Fixes the VSH in JIT mode (but NOT ir)
2026-08-25 00:22:40 +02:00
Henrik Rydgård 3bd41376da More memory cleanup 2026-08-11 20:12:10 +02:00
Henrik Rydgård 1ca63161b3 More minor fixes 2025-02-04 10:19:34 -06:00
Henrik Rydgård d5bfc1b5eb Finish up this cleanup (move _M_SSE compat define out of Common.h) 2024-12-19 16:23:20 +01:00
Henrik Rydgård e93c80db4e Cleaning up our SIMD header includes, using the new header 2024-12-19 16:08:48 +01:00
Henrik Rydgård e01ca5b057 Logging API change (refactor) (#19324)
* Rename LogType to Log

* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.

* Mac/ARM64 buildfix

* Do the same with the hle result log macros

* Rename the log names to mixed case while at it.

* iOS buildfix

* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
Unknown W. Brackets 74e5e43fdc jit: Skip known prefix writes.
If we already know what's in memory and it's default, we can skip
overwriting with default values.  This is common, actually.
2023-08-22 23:26:31 -07:00
Henrik Rydgård 9db9fec898 VFPU: Some micro-optimizations. Don't fall back to interpreter path for vexp/vlog/vrexp. 2023-06-04 11:28:33 +02:00
Unknown W. Brackets 0f5859510e x86jit: Simplify memcheck handling.
Now it's mostly the same as the other jits.
2023-04-12 01:07:48 -07:00
Unknown W. Brackets a7b7bf7826 Global: Set many read-only params as const.
This makes what they do and which args to use clearer, if nothing else.
2022-12-10 21:13:36 -08:00
Unknown W. Brackets 813bfded92 x86jit: Correct vh2f NAN handling (#16275)
* x86jit: Correct vh2f NAN handling.

Allows another test to pass.

* x86jit: Reuse MAccessibleDisp().
2022-10-23 10:09:29 +02:00
Unknown W. Brackets bc16a55028 jit: Count delay slot cycles separately.
This makes it easier to count cycles per instruction, instead of ignoring
the delay slot's instruction for cycle count.
2021-04-12 07:04:22 -07:00
Unknown W. Brackets 4178f09e57 Build: More consistently avoid _M_ defines.
We use PPSSPP_ARCH in several places already, this makes it more complete.
2021-03-02 21:49:21 -08:00
Unknown W. Brackets f32f89dd90 Global: Remove some unused variables. 2021-02-15 11:59:45 -08:00
Unknown W. Brackets 5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
Unknown W. Brackets 1b00da2f3a Common: Sign extend w/func not chained casts.
Should be clearer to read and easier to get right.
2021-01-31 01:25:52 -08:00
Henrik Rydgård 9e41fafd0d Move math and some file and data conversion files out from native to Common.
Buildfixing

Move some file util files

Buildfix

Move KeyMap.cpp/h to Core where they belong better.

libretro buildfix attempt

Move ini_file

More buildfixes
2020-10-04 09:12:46 +02:00
Henrik Rydgård b43698a13d Remove most instances of base/logging.h from Common, Core, GPU, more 2020-08-15 19:08:44 +02:00
Henrik Rydgård c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgård f65a71d6d8 Compat: Option to use accurate dotprod for VMMUL.
Eliminates Tekken 6 leg shaking.
2019-08-05 11:44:52 -07:00
Henrik Rydgård 7853c90abb JIT: Split VFPU_MTX disable options. To help with #9843 2019-06-03 23:28:15 +02:00
Unknown W. Brackets a5214d0b1a Jit: Ignore high bit in vmfvc/vmtvc. 2019-03-31 17:09:55 -07:00
Unknown W. Brackets 5749ae09d0 interp: Correct vmfvc register behavior.
The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets d5273f589a interp: Mask value in vpfxd.
The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-31 08:23:36 -07:00
Unknown W. Brackets 6178a1fb33 Jit: Correct vocp prefix handling.
See #5549.  Matches tests for various prefix settings.
2019-02-23 09:15:26 -08:00
Unknown W. Brackets 419c1fbd73 Jit: Respect flags for jit types and features.
Left some free space for more.
2019-02-03 14:57:08 -08:00
Henrik Rydgård 22e65ba80d Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11 2017-08-31 01:14:51 +02:00
Henrik Rydgård 884aef6603 SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity. 2017-08-30 09:58:30 +02:00
Henrik Rydgård 8d0498303a Fix a PIC compliance bug in the VFPU. Comment other cases properly (for easy searching). 2017-08-29 11:45:12 +02:00
Henrik Rydgård 8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård 837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård 86396ba39b Turning off the "close memory finder" lets us find more RIP addressing... 2017-07-07 15:07:53 +02:00
Henrik Rydgard 8872057a2d x86-64: Linux ABI fix 2017-07-07 14:22:35 +02:00
Henrik Rydgård dad5ca45f2 Delete some unnecessary loads. These loads are done properly inside trigCallHelper. 2017-07-07 14:15:10 +02:00
Henrik Rydgård d312086a61 32-bit fixes 2017-07-07 13:57:37 +02:00
Henrik Rydgård e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård 758cbd748e Replace vminmax_sreg with mips->temp 2017-07-07 11:33:07 +02:00
Henrik Rydgård 270001e651 vminmax_sreg only needs a single element 2017-07-07 11:33:07 +02:00
Henrik Rydgård 077fafba64 Get rid of sincostemp global. Solution not tested on linux yet. 2017-07-07 11:33:06 +02:00
Henrik Rydgård cfa7c61651 More RIP removal. Also add some comments to make it easy to just search for "M(&" to find remaining offenders. 2017-07-07 11:33:06 +02:00
Henrik Rydgård 752254d404 Surprise! More. Making many commits for easier bisects. 2017-07-07 11:33:06 +02:00
Henrik Rydgård 0743334946 Guess what? More RIP elimination (but keep the fast path too) 2017-07-07 11:33:05 +02:00
Henrik Rydgård 7c3b37c561 More RIP elimination 2017-07-07 11:33:05 +02:00
Henrik Rydgård 102be8654f Remove RIP access from some matrix ops, SafeMem 2017-07-07 11:33:05 +02:00
Henrik Rydgård 2e9a9f2d7c Move mscxr_temp to MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård d82f90f1b2 More RIP removal 2017-07-07 11:33:05 +02:00