Henrik Rydgård and Claude Opus 5.5
46ae865b95
x86 JIT: Call the VFPU math helpers without the full thunk
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The thunk saves a fixed set of registers and MXCSR on every call. The
math helpers (vrcp through vrexp2, and vrot's sincos) leave MXCSR alone,
so they now go through CallProtectedLeaf, which saves only the
caller-saved registers the caches are using, around a direct call. vrot
also no longer flushes everything first. x86-64 only; 32-bit x86 keeps
the thunk.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-09-24 16:22:22 -06:00
Henrik Rydgård
2797cfca56
Remove more vestiges of old experiments
2026-02-12 01:23:48 +01:00
Unknown W. Brackets
b9de1a44df
jit: Reduce some include pollution.
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Usually no need for all of MIPSAnalyst.
2022-10-27 23:26:44 -07:00
Unknown W. Brackets
4178f09e57
Build: More consistently avoid _M_ defines.
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We use PPSSPP_ARCH in several places already, this makes it more complete.
2021-03-02 21:49:21 -08:00
Unknown W. Brackets
cae0815095
jit: Avoid using mips identifier directly.
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Apparently this gets defined on mips systems.
2021-02-26 07:24:58 -08:00
Henrik Rydgård
47a3bf1dd7
Step 2 of removing PanicAlert
2020-07-19 20:34:02 +02:00
Unknown W. Brackets
ef1dc583a2
Fix various minor warnings.
2016-03-20 14:17:51 -07:00
Henrik Rydgård
c1b91ff5c1
x86: Add a way to eliminate some mov instructions.
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Not currently used yet.
2015-04-12 13:50:23 -07:00
Unknown W. Brackets
179e996b0b
jit: Discard unused regs before a syscall.
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This is a pretty minor optimization, though.
2015-03-01 11:08:59 -08:00
Chin
37f50a3792
Change to pass some arguments by reference
2015-03-01 16:49:00 +01:00
Unknown W. Brackets
77777e372d
x86jit: Use R15 when safe for the jit.
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This is virtually always safe.
2014-12-17 08:09:59 -08:00
Unknown W. Brackets
afdbf5610b
jit: Use nicknames for a few more static regs.
2014-12-17 01:11:33 -08:00
Henrik Rydgard
05a8e2e35d
Some work towards being able to build two JITs together
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This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Unknown W. Brackets
f817d49dfb
jit: Discard clobbered registers on spill.
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If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
Unknown W. Brackets
eeff110c0f
jit: Improve and unify GPR spill logic.
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Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
Unknown W. Brackets
9dd6bb56bb
jit: Make available js_ and jo_ in regcaches.
2014-12-07 21:07:23 -08:00
Henrik Rydgard
51d55bd645
Namespacing cleanup (it's bad to do "using namespace" in a header)
2014-12-07 14:44:15 +01:00
Henrik Rydgard
1c78e29c79
x86 jit: For clarity, use TEMPREG where it doesn't matter that it's EAX.
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Might have missed a few places.
2014-11-16 17:38:26 +01:00
Henrik Rydgård
eab010a0c0
x86 JIT: Sacrifice a register for a pointer to the MIPS context. Shrinks emitted x86 code considerably.
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Nice in 64-bit, but might be a bit too much in 32-bit though... Needs testing.
2014-10-12 19:35:55 +02:00
Unknown W. Brackets
27870aa593
x86jit: Map HI/LO as registers.
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Not actually ever cached, but now it's all consistent.
2014-06-28 00:38:56 -07:00
Unknown W. Brackets
acad2e1763
x86jit: Cache fpcond in a register.
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Mostly to match armjit.
2014-06-28 00:38:55 -07:00
Unknown W. Brackets
fd38b10ab6
x86jit: Rename imm funcs to match armjit.
2013-11-10 21:59:49 -08:00
Henrik Rydgard
5ad04a23f4
x86 jit: Rename BindToRegister to MapReg
2013-11-09 15:23:31 +01:00
Unknown W. Brackets
97aa1a631e
Improve typesafety in the x86 regalloc.
2013-08-24 19:41:10 -07:00
Unknown W. Brackets
52d6080fb4
Pass in some analysis results, don't use yet.
2013-08-24 15:36:24 -07:00
Unknown W. Brackets
64c2ea86c0
Add a method to save the gpr/fpr state in jit.
2013-08-16 00:12:49 -07:00
Henrik Rydgard
3b9e6243eb
Only flush the required registers on function calls (only implemented for real on ARM)
2013-07-28 22:21:43 +02:00
Henrik Rydgard
68991511ee
Split out the FPU reg cache into its own file too.
2013-01-26 01:34:19 +01:00
Henrik Rydgard
ad5e2b58c6
Separate the two regcaches before doing major surgery to FPURegCache.
2013-01-26 01:34:18 +01:00
Unknown W. Brackets
ce5f393fb8
Hit immediates in the ALU better and more simply.
2013-01-25 00:16:55 -08:00
Henrik Rydgard
64cc573703
Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK.
2012-11-04 23:24:00 +01:00
Henrik Rydgard
4f7ad15758
Add snapshot of the whole source code.
2012-11-01 16:19:01 +01:00
