Commit Graph
23 Commits
Author SHA1 Message Date
Henrik RydgårdandClaude Opus 5.5 4849ef020e Decode the unused bits of shifts and Allegrex bit ops as the PSP does
srl/srlv rotate when the low bit of their unused field (rs or sa) is
set and shift when it's clear, whatever the other bits hold
(cpu/cpu_alu/shift_encodings). The interpreter treated values above 1 as
invalid and the other cores shifted.

The Allegrex bit ops decode only some bits of sa, so all 32 values are
one of wsbh, wsbw, seb, seh and bitrev (cpu/cpu_alu/allegrex_encodings).
AllegrexBitOp() gives the canonical one for every core. Special3
function 0x18 does nothing on the PSP, where it was decoded as an alias
of 0x20.

The interpreter dispatch is regenerated, and its generator now lists
each instruction name once. CPUEquivalence no longer skips the srl/srlv
encodings.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 10:56:48 +02:00
Henrik RydgårdandClaude Opus 5.5 241e781810 JIT: Switch rounding modes around interpreted ctc1 and syscalls only
Interpreted ops run in the guest's mode. A syscall left to the interpreter
(with JitDisable flags, say) is host code and now gets the host's mode, like a
compiled one, and an interpreted ctc1 to fcr31 now takes effect right away:
nothing set hasSetRounding for it, so the mode only reached the host at the
next time slice. Every other interpreted op skips the two calls it used to
make after it. The IR frontend's Comp_Generic, which the IR interpreter and the
IR native backends share, gets the same treatment.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-14 09:26:28 +02:00
Henrik Rydgård 4befbeac7c Move the dump playback mips code to Playback.cpp. Assorted cleanup. 2024-12-10 01:27:25 +01:00
Henrik Rydgård ccd5bcaa45 Add facility for __KernelGPUReplay to request to be called again 2024-12-10 01:27:25 +01:00
Unknown W. Brackets 5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
Unknown W. Brackets 1b00da2f3a Common: Sign extend w/func not chained casts.
Should be clearer to read and easier to get right.
2021-01-31 01:25:52 -08:00
Unknown W. Brackets f0cc975865 Hook some funcs in Me and My Katamari.
One is a very hardcoded screenshot download / vfpu convert to 565, and the
other is some very weird check to make sure render is clear or has
happened or something.

The screenshot func detects downloads for the "Royal Album".  The render
check detects downloads for post-rename (no idea why it checks here.)

Fixes #7695.
2016-05-20 22:30:25 -07:00
AdamN 1c7152db3a Adding Branch opcode to the MAKE_MIPS
Temp revert old version to fix conflict; Implementing built-in PRO Adhoc Server; Add back sceUsbGps

Implementing more Adhoc functions, and some bug fix (i don't remember them anymore)
2015-01-04 13:04:02 +01:00
Henrik Rydgard ac772f25ff x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues. 2014-11-30 11:04:13 +01:00
Unknown W. Brackets 292a9ea567 Clear module text and bss on unload.
Text is set to break instructions, data/bss to -1.  Matches results on a
PSP.
2014-07-13 22:00:32 -07:00
Unknown W. Brackets 5dd8ebe2b4 Add a hook for Gods Eater Burst's swizzled copy. 2014-05-31 10:03:01 -07:00
Unknown W. Brackets a843cbd580 Shrink the very common sceKernelThread.h include. 2014-03-15 11:44:02 -07:00
Unknown W. Brackets eca06c60c7 Spend a bit less time in Read_Instruction on load. 2014-03-02 10:20:40 -08:00
Henrik Rydgård 00c32ddadb Mostly get rid of including "Globals.h" 2013-12-30 10:17:11 +01:00
Henrik Rydgard 2d8429ac48 Assorted cleanup in the MIPS emulation 2013-12-10 13:15:16 +01:00
Unknown W. Brackets 97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets 109ad17ac6 Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
Unknown W. Brackets e639f8d15f Handle branches in VFPU delay slots better.
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
2013-08-14 22:56:02 -07:00
Kingcom 32f1ca91fd -add function to get relevant opcode information for the disassembly
-put it to use to clean up code
2013-07-30 10:14:56 +02:00
Unknown W. Brackets 1c923611e0 Fix a typo. 2013-05-27 00:16:22 -07:00
Unknown W. Brackets 44e20fb213 Correctly detect bltzal as func calls in debug. 2013-05-26 16:24:58 -07:00
Henrik Rydgard 64cc573703 Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK. 2012-11-04 23:24:00 +01:00
Henrik Rydgard 4f7ad15758 Add snapshot of the whole source code. 2012-11-01 16:19:01 +01:00