Commit Graph
196 Commits
Author SHA1 Message Date
Henrik Rydgard 12edfcea5a Enough to run cpu_alu.prx. 2016-05-07 21:00:30 +02:00
Henrik Rydgard 4acf85aa06 It's kind of starting to run 2016-05-07 17:37:19 +02:00
Henrik Rydgard 49a6a2f6cf Minor refactor - let's not access a global when we don't need to 2016-05-06 21:22:36 +02:00
Henrik Rydgard ffe4c266ef Add CodeBlockCommon base class to remove further arch-specificity in JitBlockCache
Remove unused ArmThunk.
2016-05-01 11:40:00 +02:00
Henrik Rydgard 5aadce59a2 Move architecture-specific code out of JitBlockCache 2016-05-01 11:39:58 +02:00
Henrik Rydgard b998131581 Move the symbol map to the heap, deallocate it when no game is running. 2015-10-31 23:01:19 +01:00
Henrik Rydgard aa584d1992 x86 32-bit buildfix 2015-10-24 11:10:14 +02:00
Henrik Rydgard b7db15225f x64 disasm: properly symbolize rip-relative addresses 2015-10-24 10:37:01 +02:00
Henrik Rydgard 92f7f459dc Not safe to change the rounding mode function pointer in GenerateCode 2015-10-10 16:46:07 +02:00
Henrik Rydgard 1ddb508542 Improve x86 disassembly (a few symbols) 2015-10-10 13:05:17 +02:00
Henrik Rydgard d628b9b57b Minor fixes, mostly comments 2015-10-10 10:03:34 +02:00
Henrik Rydgard 7fee5abf9f x86/x64: Don't use a separate code block for pregenerated functions, just like on ARM 2015-10-08 22:15:28 +02:00
Henrik Rydgard c41baab747 Pregenerate code to handle rounding mode switches. This time, for all three cores. 2015-10-08 19:58:37 +02:00
Henrik Rydgard bfed830f91 Remove the ability to disable rounding mode support. It's time. 2015-10-08 14:54:42 +02:00
Henrik Rydgard 6dd86cd843 Get rid of the ForceFlushToZero hidden config option 2015-10-08 14:54:41 +02:00
Henrik Rydgard 68fc776fa7 Work around some crashes I got trying to load a GTA:LCS savestate from 2014.
However, the savestate still loads to a black screen, although background audio is working.
2015-10-04 10:34:15 +02:00
Henrik Rydgard aaa8350591 Windows: Fix some remaining ASLR issues 2015-07-15 22:25:24 +02:00
Unknown W. Brackets 8fdceba7ca Add timing for all the basics.
This way we can see overall stats for a frame.
2015-07-03 12:05:08 -07:00
Henrik Rydgård 70fa830ba5 Split out the ReplaceJalTo test logic.
This makes it so the IR, in the future, can work correctly for
replacements.
2015-04-12 13:35:10 -07:00
Henrik Rydgård d014d420db Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00
Henrik Rydgård 81dec36da8 Use an accessor to read the compilerPC.
In the IR it will be read from the block.
2015-04-11 01:14:37 -07:00
Henrik Rydgård a897723e6a Separate out jit reading nearby instructions.
This makes it easier to use an IR for these things, or remove them.
2015-04-11 00:53:24 -07:00
Unknown W. Brackets 9d52ee4e21 Fix cases where breakpoints were skipped.
After reset or savestate load.
2015-03-17 23:06:25 -07:00
Chin 37f50a3792 Change to pass some arguments by reference 2015-03-01 16:49:00 +01:00
Henrik Rydgard 07933cad42 Revert "Minor optimizations, add a failsafe"
This reverts commit 48e4d1edae.
2015-01-22 19:52:58 +01:00
Henrik Rydgard 48e4d1edae Minor optimizations, add a failsafe 2015-01-20 20:08:12 +01:00
Unknown W. Brackets 9cb1151b67 x86jit: Disable replacements w/ breakpoints inside.
This does alter graphics (memcpys won't fire anymore), but it also means
breakpoints work which is nice.
2015-01-18 21:26:37 -08:00
Unknown W. Brackets 5f6f8ac0a2 x86jit: Fix another sequential detect problem.
Arg.  Maybe should use voffset after all, but it won't fit in a u8
anyway...
2014-12-31 22:43:31 -08:00
Unknown W. Brackets c5f7b6fa72 x86jit: Disable simd again for now. 2014-12-31 19:43:40 -08:00
Bovine a9b7656f93 Fix to VFPU register allocation. Fixes #7174
GetFreeXRegs(_,_,true) invalidates registers it can see on spill,
but it can't see all the registers in the array due to how we call it
so we have to invalidate the rest ourselves.  Not doing so can get it
to use the same register twice.
2014-12-23 03:39:50 -07:00
Unknown W. Brackets 77777e372d x86jit: Use R15 when safe for the jit.
This is virtually always safe.
2014-12-17 08:09:59 -08:00
Unknown W. Brackets b9eddc3d25 x86jit: Oops, fix a typesafety error. 2014-12-17 08:07:43 -08:00
Unknown W. Brackets 9022b48069 x86jit: Skip reload of EAX in safe cases.
Probably no real improvement in perf, but a bit cleaner and one less TODO.
2014-12-17 01:12:41 -08:00
Henrik Rydgård 5ae4cc8959 x86: Turn VFPU SIMD off again. See #7173 and #7174 2014-12-13 13:35:29 +01:00
Unknown W. Brackets 9dd6bb56bb jit: Make available js_ and jo_ in regcaches. 2014-12-07 21:07:23 -08:00
Henrik Rydgard 51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
Henrik Rydgard 8bd20ed8d1 x86 jit: Implement matrix init ops in SIMD. Turn off SIMD again by default (oops) 2014-11-29 12:30:21 +01:00
Henrik Rydgard 8f016d3e48 Merge some matrix utils and stuff from the NEON branch 2014-11-29 11:37:45 +01:00
Henrik Rydgard bbd0afd148 x86 jit: Disable SIMD by default, needs just a little more debugging.. 2014-11-26 22:30:41 +01:00
Unknown W. Brackets abd425d9f1 x86jit: Re-enable the simd optimization. 2014-11-26 09:21:15 -08:00
Unknown W. Brackets a4b9122943 x86jit: Use NS instead of NBE for checked entries.
This may cause us to more correctly bail on linked blocks in some cases.
2014-11-23 11:05:49 -08:00
Unknown W. Brackets fe525a52f9 Update native (shutdown crash) + comment. 2014-11-23 11:04:07 -08:00
Unknown W. Brackets 473f388088 Disable the simd stuff for now.
Won't have time to look at this for a bit...
2014-11-20 14:07:56 -08:00
Unknown W. Brackets ab7dd0df25 x86jit: Add an option to enable/disable vpfu simd. 2014-11-17 20:37:27 -08:00
Unknown W. Brackets 5bb9d32eaa jit: Fix partial invalidation of larger blocks.
Fixes #7031.
2014-10-27 19:04:19 -07:00
Unknown W. Brackets d98adf27d6 x86jit: Add proxy blocks for continuing. 2014-10-12 17:15:31 -07:00
Unknown W. Brackets 01f9521dc5 jit: Invalidate blocks even if they end unevenly.
This allows blocks to start and end where ever they need, which should be
good for replacements and for continuing.
2014-10-12 17:13:04 -07:00
Unknown W. Brackets 90821b761d x86jit: Pad linked exits with breakpoints.
So that we don't get garbage, and so we see if we end up there.
2014-10-12 16:00:58 -07:00
Unknown W. Brackets 0f32103615 x86jit: Consistently use mips_. 2014-10-12 15:16:09 -07:00