Commit Graph
960 Commits
Author SHA1 Message Date
Henrik RydgårdandClaude Opus 5 35a91b757a Move the temporary breakpoint out of the user's breakpoint list
step-over, step-out and run-until plant a one-shot breakpoint at the address
they want execution to return to. Keeping it in breakPoints_ alongside the
user's own meant the two kept colliding:

- Adding a log-only user breakpoint at the same address hijacked the temporary
  one. AddBreakPoint() didn't match across temp-ness so both existed, and then
  ChangeBreakPoint() looked up "the first enabled breakpoint at this address" -
  a log-only breakpoint isn't enabled, so the temporary one won and had its
  action overwritten to log-only. It lost PAUSE and the step never came back.
- RemoveBreakPoint() erased up to two entries per address to catch an
  overlapping temporary one, so deleting either deleted both - including the
  interpreter's cleanup path in CheckExecBreakpoints() taking the user's
  breakpoint with it.
- ExecBreakPoint() handled one breakpoint per address, so with both at the same
  address only one of them did anything: the step completed but the user's log
  line never printed.
- Nothing dropped it when something *else* stopped us first, so an interrupted
  step left a breakpoint armed at an address nobody was waiting for anymore,
  which later fired as a phantom stop.

It's a single TempBreakPoint member now, invisible to the breakpoint lists and
untouched by user edits. One is enough: step over/out and cross-thread step into
all require the CPU to already be stepping and resume it immediately, so only
one can be in flight, and run-until now replaces rather than stacking (two
pending run-untils had no coherent meaning, and the loser stayed armed).

Behavior follows what other debuggers do. Both breakpoints at an address are
evaluated independently and their actions combine, so a log-only breakpoint
logs without stopping and still lets the step finish. Core_Break() drops the
temporary breakpoint on any stop, whatever the reason - the same way gdb deletes
its step-resume breakpoint and lldb discards the thread plan.

Two things to be careful of, both covered by the new TempBreakpoints test:
HasBreakPoints() has to account for it, or the interpreter's checked run loop
and the JIT skip breakpoint checking entirely and a step with no user
breakpoints set never returns; and IsAddressBreakPoint() (user-facing, for the
lists and disassembly markers) is now separate from NeedsBreakCheckAt() (what
the JIT frontends and interpreter ask), since only the latter should see it.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01GZq8ZtJmFY7bkX5FVkr3P9
2026-08-17 00:29:26 +02:00
Henrik Rydgård 9f90512ef6 Make instruction cache invalidation (for us, jit cache invalidation) clearer 2026-08-16 16:59:52 +02:00
Henrik Rydgård 67ddf899ba Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones. 2026-08-15 19:14:13 +02:00
Henrik Rydgård eb0813c0e3 Add a utility function for all the ABIs to call functions with a pointer arg. Use to call Advance from the JIT with the MIPSContext. Indent some code better. 2026-08-13 08:09:30 +02:00
Henrik RydgårdandClaude Sonnet 5 ffad0acea1 Plumb an explicit MIPSState *mips through the interpreter's Int_* handlers
All ~82 MIPSInt::Int_* functions (Interpreter.cpp/.h,
InterpreterVFPU.cpp/.h) now take an explicit MIPSState *mips instead
of reaching for the global currentMIPS internally, along with their
file-local helpers (DelayBranchTo, SkipLikely, ApplySwizzleS/T,
ApplyPrefixD/ST, RetainInvalidSwizzleST, EatPrefixes). MIPSInterpretFunc,
Interpret(), ExecInstruction()/InterpreterDispatch.cpp (regenerated),
and RunUntilFast() all thread mips through accordingly.

Deliberately left on currentMIPS for now: MIPSVFPUUtils.cpp's
ReadVector/WriteVector/ReadMatrix/WriteMatrix/VFPURewritePrefix -
these are shared with every JIT backend's compile-time VFPU code, so
parameterizing them would balloon this into a JIT-wide refactor. This
is a partial refactor; that's the next boundary to push on.

Several JIT backends (x86 Jit.cpp, ARM/ArmJit.cpp, ARM64/Arm64Jit.cpp,
x86/X64IRJit.cpp, RiscV/RiscVJit.cpp, LoongArch64/LoongArch64Jit.cpp,
ARM64/Arm64IRJit.cpp) bake the raw interpreter function pointer
directly into JIT-generated machine code as their "fall back to the
interpreter for this one op" mechanism, with only a single argument
register set up for the call. Rather than hand-editing register
allocation across four architectures that can't be build-tested here,
added MIPSInterpretTrampoline(MIPSOpcode op) - a 1-arg wrapper around
MIPSInterpret(currentMIPS, op) - and pointed all 7 such call sites at
it instead, leaving that codegen untouched. Two other call sites
(JitLogMiss, JitBranchLog) were plain C++ calls and just got the
extra argument directly.

Verified (Windows x64): PPSSPPWindows/PPSSPPHeadless/UnitTest all
build clean, 49/49 unit tests pass. `test.py -g --graphics=software`:
interpreter 312/314 (cpu/fpu/fpu is the pre-existing, unrelated
interpreter-vs-JIT denormal difference; gpu/rendertarget/copy passes
standalone, so was cross-test state bleed in the batch run, not a
regression), default JIT 314/314, jit-ir 313/314 (gpu/vertices/morph
is an expected difference from the vertex decoder taking a different
mode with this core change, not a bug).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019SKhm9wKEQzRUsx9mTrrtQ
2026-08-12 14:02:19 +02:00
Henrik RydgårdandClaude Sonnet 5 d718bda178 Rename MIPSInt/MIPSIntVFPU to Interpreter/InterpreterVFPU
Just a file rename (plus updating all build configs and includes) to
give the interpreter source files clearer names. No functional change.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_019SKhm9wKEQzRUsx9mTrrtQ
2026-08-12 10:04:40 +02:00
Henrik Rydgård 0596ee97f6 More memory access cleanup 2026-08-11 20:14:01 +02:00
Henrik Rydgård 3bd41376da More memory cleanup 2026-08-11 20:12:10 +02:00
Henrik Rydgård b42157aa49 Core: Add utility function to properly report memory exceptions from HLE functions (when they would actually crash the PSP) 2026-08-10 10:41:32 +02:00
Henrik Rydgård 749e3a02cb Jit: Add missing instruction address check from ARM jits 2026-02-26 10:37:12 +01:00
Henrik Rydgård 8897b5914a Improve integrity checks in JIT (trying to catch an elusive crash) 2026-02-17 22:42:04 +01:00
Henrik Rydgård 1b0e701c87 Expose some more pointers in the ImDebugger UI 2026-02-17 22:40:00 +01:00
Henrik Rydgård f0ba391a4e Remove the whole concept of proxy blocks from the block cache, and experimental uses of it. 2026-02-17 09:40:27 +01:00
Henrik Rydgård 9f5be16663 Jit: Remove the Jal-to-replacement optimization (really not all that benificial) 2026-02-17 09:40:27 +01:00
Henrik Rydgård 2797cfca56 Remove more vestiges of old experiments 2026-02-12 01:23:48 +01:00
Henrik Rydgård 44a2585753 Rename some function, remove an unused return value 2026-02-12 01:23:45 +01:00
Henrik Rydgård d5444a7f46 Remove old rudimentary start at a MIPS->MIPS jit 2026-02-11 23:33:41 +01:00
Henrik Rydgård 4a8aeac38a Jit: Remove unused x86-only feature continueBranches. 2026-01-29 17:41:57 +01:00
Henrik Rydgård d6ebfed432 Fix some bugs and warnings from a pass of static analysis 2026-01-29 17:41:54 +01:00
Henrik Rydgård ba148e5ec7 JIT/IRJit: Delete an old "function preloading" experiment
This caused some confusion while trying to debug #20502
2025-06-11 15:45:18 +02:00
Henrik Rydgård dbe6ec80a0 Fix some bad "for (auto x : y)" usage 2025-04-29 16:46:14 +02:00
Henrik Rydgård 41b77bf1ae More log cleanup 2025-04-14 22:27:51 +02:00
Henrik Rydgård 962bd8239d Remove more excessive error reporting. 2025-03-02 02:28:45 +01:00
Henrik Rydgård 31cf5771f4 Turn the break reason into an enum, fix some minor issues 2025-02-19 16:01:11 -06:00
Henrik Rydgård 948c38a034 Some more minor fixes 2025-02-04 10:24:55 -06:00
Henrik Rydgård 1ca63161b3 More minor fixes 2025-02-04 10:19:34 -06:00
Henrik Rydgård d5bfc1b5eb Finish up this cleanup (move _M_SSE compat define out of Common.h) 2024-12-19 16:23:20 +01:00
Henrik Rydgård e93c80db4e Cleaning up our SIMD header includes, using the new header 2024-12-19 16:08:48 +01:00
Henrik Rydgård 83af54950f Move more core-related stuff into Core.cpp/h 2024-12-08 11:54:58 +01:00
Henrik Rydgård 96c4a10e8c Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping. 2024-12-01 21:04:21 +01:00
Henrik Rydgård 7992ff4627 Make CBreakpoints an object 2024-11-25 00:22:53 +01:00
Henrik Rydgård d3e9398cb3 Split Core_EnableStepping into Core_Break and Core_Resume 2024-11-03 17:53:42 +01:00
Henrik Rydgård 1a89c26dc0 Warning fixes 2024-10-03 18:19:11 +02:00
Henrik Rydgård 85e7ff7ac3 Target->Native renaming. More intuitive (at least to me) 2024-07-22 01:24:34 +02:00
Henrik Rydgård 9d36a08ec4 Some renaming, remove a gross hack 2024-07-21 19:12:51 +02:00
Henrik Rydgård e01ca5b057 Logging API change (refactor) (#19324)
* Rename LogType to Log

* Explicitly use the Log:: enum when logging. Allows for autocomplete when editing.

* Mac/ARM64 buildfix

* Do the same with the hle result log macros

* Rename the log names to mixed case while at it.

* iOS buildfix

* Qt buildfix attempt, ARM32 buildfix
2024-07-14 14:42:59 +02:00
Henrik Rydgård 5526ef012c Store IR instructions in a large arena vector instead of loosely in each block. 2024-06-07 09:28:27 +02:00
Henrik Rydgård e75e7a0e43 Add an optimizeForInterpreter flag 2024-05-26 13:41:31 +02:00
Henrik Rydgård 126d88ecfc Back out clearly inconsequential/useless .reserve() calls 2023-12-29 08:27:56 +01:00
Henrik Rydgård e5af1f8bd0 Merge pull request #18560 from unknownbrackets/replacement-slice
HLE: Slice the very slow memset/memcpy variants
2023-12-17 12:35:48 +01:00
Unknown W. Brackets 053831bf4d HLE: Add mechanics for sliced replacements. 2023-12-16 09:08:58 -08:00
Unknown W. Brackets 5311997753 x86jit: Correct downcount on replacement in IR. 2023-12-16 08:10:29 -08:00
Herman Semenov b871e76d05 [Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible 2023-12-15 13:59:19 +03:00
Henrik Rydgård 76f0c6cab4 Merge pull request #18305 from unknownbrackets/x86-ir-vcmp
x86jit: Fix IR vcmp all bit
2023-10-04 07:48:42 +02:00
Unknown W. Brackets f1a9e39ce9 x86jit: Fix IR vcmp all bit. 2023-10-03 17:46:29 -07:00
Unknown W. Brackets 521335cb2a x86: Fix 32-bit IR jit block entry. 2023-10-02 20:26:07 -07:00
Unknown W. Brackets 00c80cea6e irjit: Optimize offset logging during compile.
As I guessed, this was expensive.  using a vector and reserve isn't very.
It's nice to keep this before logBlocks_ is > 0, in case it's set mid
block.
2023-09-30 15:56:18 -07:00
Henrik Rydgård 51d5026792 WriteExit: Assert on bad exit numbers 2023-09-26 19:39:48 +02:00
Henrik Rydgård 9fffa33eee Merge pull request #18234 from unknownbrackets/x86-ir-transfer
x86jit: Perform vector transfers instead of flushing to memory
2023-09-26 09:28:05 +02:00
Unknown W. Brackets 38e5b33a53 x86jit: Prefer BLENDPS to INSERTPS.
It's faster, this performs better.
2023-09-25 22:12:48 -07:00