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f5d5f7d3fa
Use SSE shifts for high-vol channels.
2014-12-08 21:23:47 -08:00
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42cd751060
Prevent a few savestate cross-compat issues.
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We don't need to save gpu stats at all, so don't, makes it easier to
change it and dunno if anyone defines double as other than 64 bits.
Also, apparently there was padding in the event state but not on all
platforms.
2014-12-08 21:18:56 -08:00
Unknown W. Brackets
afc779a824
jit: Add IN_RT to lwl/lwr and re-enable clobbering.
2014-12-08 21:17:01 -08:00
Henrik Rydgård
f135bf79e3
Merge pull request #7157 from lioncash/override
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Core: Add missing override specifiers
2014-12-08 22:37:33 +01:00
Lioncash
cac632424c
Core: Add missing override specifiers
2014-12-08 15:20:31 -05:00
Lioncash
ae5be5a814
sceSha256: Mark sceSha256Digest as static
2014-12-08 12:31:57 -05:00
Henrik Rydgård
38345a497f
Merge pull request #7137 from lioncash/static
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Core: Mark some module functions as static
2014-12-08 11:10:14 +01:00
Unknown W. Brackets
066ce50a12
Disable SSE clamping for certain volume levels.
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Fixes sound in Tales of Phantasia. Can improve later.
2014-12-08 02:06:25 -08:00
Unknown W. Brackets
bfe5f9276e
jit: Re-disable clobbered thing.
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No idea what's wrong...
2014-12-08 02:06:25 -08:00
Henrik Rydgård
82d69fad8d
Merge pull request #7146 from hrydgard/sha256
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Quick implementation of sceSha256Digest from #7134
2014-12-08 10:40:56 +01:00
Lioncash
4ccb838306
Core: Mark some module functions as static
2014-12-08 04:40:08 -05:00
Unknown W. Brackets
7734a4c912
jit: Re-enable clobbering with movz/movn support.
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Oops, these should be the only ones that take rd "in".
2014-12-08 01:29:41 -08:00
Unknown W. Brackets
119c1ef83e
jit: Disable clobber detection for now.
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Should still spill better. Something is wrong with flags detection, a
clobber to rd is incorrectly discarding outside a delay slot. Don't have
time now to look into it further.
2014-12-08 01:24:17 -08:00
Unknown W. Brackets
f817d49dfb
jit: Discard clobbered registers on spill.
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If we're spilling anyway, discard rather than saving.
2014-12-07 23:08:21 -08:00
Unknown W. Brackets
f6531a74e1
Don't allow clobbering in a likely delay slot.
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Since, we don't know which path it will take. Also, don't clobber when
it's the delay slot of the instruction in question - this was a tricky
case.
2014-12-07 23:04:05 -08:00
Unknown W. Brackets
eeff110c0f
jit: Improve and unify GPR spill logic.
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Now the same logic on x86 and ARM, and handles HI/LO/etc. better.
2014-12-07 21:10:28 -08:00
Unknown W. Brackets
487e175cf9
Fix a sign comparison warning.
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This isn't really negative anyway.
2014-12-07 21:08:03 -08:00
Unknown W. Brackets
9dd6bb56bb
jit: Make available js_ and jo_ in regcaches.
2014-12-07 21:07:23 -08:00
Unknown W. Brackets
58ff826b73
Cleanup to link assembler on arm unittest builds.
2014-12-07 15:41:11 -08:00
Henrik Rydgård
9ea5c8a1c4
Merge pull request #7116 from Kingcom/master
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Update assembler again
2014-12-08 00:26:39 +01:00
Henrik Rydgård
6546a5ac03
Merge pull request #7143 from lioncash/net
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proAdhoc: Make some functions return boolean values.
2014-12-08 00:26:25 +01:00
Henrik Rydgård
e46976f08e
Merge pull request #7147 from lioncash/moarconst
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Mark some functions as const
2014-12-08 00:25:42 +01:00
Henrik Rydgard
50bb3e1e05
Minor fixes
2014-12-08 00:18:13 +01:00
Lioncash
a962bc5a6c
Mark some functions as const
2014-12-07 17:08:13 -05:00
Henrik Rydgard
7de3ed109a
Android x86 buildfix
2014-12-07 22:00:30 +01:00
Henrik Rydgard
1a1faeffd1
More audio microoptimization
2014-12-07 21:14:09 +01:00
Henrik Rydgard
28aa18953a
Audio: Minor SSE2 optimization, just because
2014-12-07 20:23:47 +01:00
Henrik Rydgard
8102a67602
Implement sceSha256Digest (untested)
2014-12-07 19:25:45 +01:00
Henrik Rydgard
29e681808d
Merge branch 'sceSha256' of https://github.com/daniel229/ppsspp into daniel229-sceSha256
2014-12-07 19:11:45 +01:00
Henrik Rydgard
51d55bd645
Namespacing cleanup (it's bad to do "using namespace" in a header)
2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9
Rename the ARM Jit class to ArmJit
2014-12-07 14:25:22 +01:00
Henrik Rydgard
7740caeade
Buildfix the arm emitter test in the unittest.
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Also do some preparation for being able to have two JITs compiled at the same time
which may be useful in testing parts of the ARM jit on Windows.
2014-12-07 14:12:13 +01:00
Henrik Rydgard
e2f61459d3
ARM Jit: Implement vfad/vavg
2014-12-07 13:02:16 +01:00
Henrik Rydgard
80ce45f9fb
ARM Jit: Join adjacent vrot ops on ARM too
2014-12-07 12:07:54 +01:00
Henrik Rydgard
c2503b1406
ARM jit: Prepare for joining vrot ops
2014-12-07 11:58:19 +01:00
Henrik Rydgard
37413f8119
We can use sincosf again on Android - the bug in the NDK has been fixed.
2014-12-07 11:53:46 +01:00
Henrik Rydgard
4d8db38798
Some more
2014-12-07 00:30:45 +01:00
Henrik Rydgard
ceed0a92c3
Undo some accidental reverts
2014-12-07 00:25:15 +01:00
Lioncash
1d9ace08ae
proAdhoc: Make some functions return boolean values.
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Also shortens validNetworkName a little.
2014-12-06 14:48:46 -05:00
Henrik Rydgard
ff4746cd17
Merge the rest of the old NEON branch.
2014-12-06 13:14:03 +01:00
Henrik Rydgard
d98bde8e50
Merge the RegCache changes from the old neon-vfpu branch
2014-12-06 12:26:58 +01:00
Henrik Rydgard
29dcc0a303
Minor cleanups, warning fixes
2014-12-06 12:25:28 +01:00
Henrik Rydgard
d46c9c2f74
x86 jit: Minor optimization in vmmul
2014-12-06 11:35:01 +01:00
Lioncash
15aa29d178
MIPSAnalyst: Pass strings by const reference.
2014-12-05 13:12:49 -05:00
daniel229
49b2939f0d
sceSha256
2014-12-04 22:44:41 +08:00
Henrik Rydgard
ea6371921a
x86 jit: Hack around running out of regs on x86-32 with SIMD
2014-12-04 00:19:08 +01:00
Henrik Rydgard
e3a81f4346
x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..)
2014-12-04 00:18:58 +01:00
Lioncash
cd26b200b2
Core: Get rid of a few c_str/strlen calls
2014-12-03 17:15:05 -05:00
Henrik Rydgård
c1084b6b93
Merge pull request #7131 from lioncash/scempeg
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sceMpeg: Remove an unnecessary if statement
2014-12-03 22:53:02 +01:00
Lioncash
efaba33624
sceMpeg: Remove an unnecessary if statement
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stream is previously used in the above memcpy, so this check is not necessary.
2014-12-03 16:49:01 -05:00
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