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jit: Add IN_RT to lwl/lwr and re-enable clobbering.
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@@ -296,7 +296,7 @@ allocate:
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if (bestToSpill != INVALID_REG) {
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// ERROR_LOG(JIT, "Out of registers at PC %08x - spills register %i.", mips_->pc, bestToSpill);
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// TODO: Broken somehow in Dante's Inferno, but most games work. Bad flags in MIPSTables somewhere?
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if (clobbered && false) {
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if (clobbered) {
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DiscardR(ar[bestToSpill].mipsReg);
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} else {
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FlushArmReg(bestToSpill);
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@@ -147,11 +147,11 @@ const MIPSInstruction tableImmediate[64] = // xxxxxx ..... ..... ...............
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//32
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INSTR("lb", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_BYTE),
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INSTR("lh", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_HWORD),
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INSTR("lwl", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_WORD),
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INSTR("lwl", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|IN_RT|OUT_RT|MEMTYPE_WORD),
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INSTR("lw", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_WORD),
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INSTR("lbu", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_BYTE),
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INSTR("lhu", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_HWORD),
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INSTR("lwr", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|OUT_RT|MEMTYPE_WORD),
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INSTR("lwr", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_MEM|IN_IMM16|IN_RS_ADDR|IN_RT|OUT_RT|MEMTYPE_WORD),
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INVALID,
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//40
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INSTR("sb", JITFUNC(Comp_ITypeMem), Dis_ITypeMem, Int_ITypeMem, IN_IMM16|IN_RS_ADDR|IN_RT|OUT_MEM|MEMTYPE_BYTE),
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@@ -175,7 +175,7 @@ X64Reg GPRRegCache::GetFreeXReg()
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if (bestToSpill != INVALID_REG) {
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// TODO: Broken somehow in Dante's Inferno, but most games work. Bad flags in MIPSTables somewhere?
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if (clobbered && false) {
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if (clobbered) {
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DiscardRegContentsIfCached(xregs[bestToSpill].mipsReg);
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} else {
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StoreFromRegister(xregs[bestToSpill].mipsReg);
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