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1dca8bcc9268eceaa1e04015effcaae4860e2f90
Commit Graph
186 Commits
Author SHA1 Message Date
Henrik Rydgard 51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard 7740caeade Buildfix the arm emitter test in the unittest. 
Also do some preparation for being able to have two JITs compiled at the same time
which may be useful in testing parts of the ARM jit on Windows.
 2014-12-07 14:12:13 +01:00
Henrik Rydgard d46c9c2f74 x86 jit: Minor optimization in vmmul 2014-12-06 11:35:01 +01:00
Henrik Rydgard ea6371921a x86 jit: Hack around running out of regs on x86-32 with SIMD 2014-12-04 00:19:08 +01:00
Henrik Rydgard e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
Henrik Rydgard 5290ffd929 Minor cleanup in vtfm. Re-enable vrot combination. Optimize vfad/vavg when dpps is available. 
Also fixes bug in emitter of dpps.
 2014-12-03 22:44:32 +01:00
Henrik Rydgard ca8ba9532c x86 jit: Implement vtfm 2014-12-03 01:45:29 +01:00
Unknown W. Brackets 515b954670 x86jit: Re-enable vmmov simd. 2014-11-30 13:06:53 -08:00
Henrik Rydgård 2945a1acc1 Merge pull request #7120 from unknownbrackets/jit-simd 
x86jit: Add a MAP_NOLOCK flag
 2014-11-30 19:43:35 +01:00
Unknown W. Brackets 29e3819437 x86jit: Improve spilling in vf2i. 
This should improve which ones we spill on 32 bit at least.
 2014-11-30 10:38:58 -08:00
Unknown W. Brackets 0000be1bb2 x86jit: Add a MAP_NOLOCK flag to not lock. 
Only for MapRegs*.  And then lock all by default, including
TryMapRegsVS().
 2014-11-30 10:36:44 -08:00
Henrik Rydgard 466cdb8ddf x86 Jit: Basic implementation of SIMD vmmul. Can be improved. 2014-11-30 19:27:43 +01:00
Henrik Rydgard 74e70f1159 Fix silly typo 2014-11-30 17:24:56 +01:00
Henrik Rydgard ac772f25ff x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues. 2014-11-30 11:04:13 +01:00
Unknown W. Brackets bb26e4f7d0 x86jit: Implement vmmov using SIMD. 
4x -> 87x in microbenchmarking.
 2014-11-29 18:46:38 -08:00
Henrik Rydgard 8bd20ed8d1 x86 jit: Implement matrix init ops in SIMD. Turn off SIMD again by default (oops) 2014-11-29 12:30:21 +01:00
Henrik Rydgard 8f016d3e48 Merge some matrix utils and stuff from the NEON branch 2014-11-29 11:37:45 +01:00
Henrik Rydgård ae15722a2e Merge pull request #7112 from unknownbrackets/jit-simd 
jit: MAP_NOINIT should always mean MAP_DIRTY
 2014-11-29 10:19:33 +01:00
Unknown W. Brackets f6f943de63 jit: MAP_NOINIT should always mean MAP_DIRTY. 2014-11-29 00:14:08 -08:00
Henrik Rydgard 32c81c3265 x86 jit vcrsp.t: Oops, don't "SimpleReg" before doing the SIMD solution.. 2014-11-28 01:06:32 +01:00
Henrik Rydgard 344f71b092 x86 jit: Commit commented-out haddps-based vdot.q as reminder not to use haddps... 2014-11-28 00:19:11 +01:00
Henrik Rydgard 8f4d322dc6 Another oops... 2014-11-27 23:33:03 +01:00
Henrik Rydgard bcdfb496a0 Oops, bad merge 2014-11-27 23:12:57 +01:00
Henrik Rydgard c5bf3adec0 x86 jit: use the correct fp move instruction, minor optimization in vdot 2014-11-27 23:08:15 +01:00
Unknown W. Brackets bbeb5758b7 x86jit: Simplify VS() / VSX() usage. 2014-11-27 00:07:17 -08:00
Unknown W. Brackets f63c165f64 x86jit: Fix several cases of missing dirty checks. 2014-11-26 23:28:14 -08:00
Henrik Rydgard acb711007f x86 jit: SIMD-ify cross product 2014-11-27 00:18:19 +01:00
Henrik Rydgard 5033babb10 x86 Jit: SIMD-ify vdot 2014-11-26 23:47:18 +01:00
Henrik Rydgard 4b25afb7b4 x86 Jit: SIMD some more instructions 2014-11-26 22:30:06 +01:00
Henrik Rydgard 804de50711 x86 jit: SIMD-ify VFPU register file writebacks where possible 2014-11-26 01:33:05 +01:00
Henrik Rydgard b3c8a82c49 x86 jit: SIMD-ify some more 2014-11-25 23:56:46 +01:00
Henrik Rydgard b5ee47a80c x86 jit: SIMD-ify lv.q and sv.q 2014-11-25 23:28:29 +01:00
Henrik Rydgård 4db6b7f3e2 SIMD-ify a couple instructions a bit 2014-11-25 22:47:26 +01:00
Unknown W. Brackets 5347431c20 x86jit: Initial simd for VecDo3(). Broken. 
I'm not sure why/where it's broken...
 2014-11-16 13:33:15 -08:00
Unknown W. Brackets 2862367927 x86jit: Add force-non-simd to all current ops. 
Unless they already use MapRegs, because that will automatically handle
it.
 2014-11-16 13:33:12 -08:00
Henrik Rydgard bfcd3690b6 x86 jit: Fix+enable quaternion product, optimize "sw zero, *" 2014-11-16 18:37:38 +01:00
Henrik Rydgard 1c78e29c79 x86 jit: For clarity, use TEMPREG where it doesn't matter that it's EAX. 
Might have missed a few places.
 2014-11-16 17:38:26 +01:00
Henrik Rydgard 8b90f881b8 x86 jit: A tiny optimization and a tiny bugfix 2014-11-16 16:46:35 +01:00
Unknown W. Brackets 096b41cceb x86jit: Interleave reg usage in vcmp. 2014-11-10 23:22:04 -08:00
Unknown W. Brackets 0e1aa35e84 x86jit: Just do the ES/NS compare once. 2014-11-10 23:04:38 -08:00
Unknown W. Brackets 2758e8fa3c x86jit: Optimize vcmp for single and simd. 2014-11-10 23:04:37 -08:00
Unknown W. Brackets 27d8108bb2 x86jit: Optimize loads of 0 into fp regs. 2014-11-08 18:41:16 -08:00
Unknown W. Brackets 57caa95273 x86jit: Implement round.w.s and friends. 
They are not terribly fast, though, updating MXCSR.
 2014-11-08 17:59:38 -08:00
Unknown W. Brackets 671dee85c7 x86jit: Micro optimize vi2f a little bit. 
This didn't help overall perf much but micro benchmarks are better.
 2014-11-08 13:07:01 -08:00
Unknown W. Brackets c29b126357 x86jit: Oops, can't have an imm here. 2014-11-08 12:41:48 -08:00
Unknown W. Brackets c0be19edb6 x86jit: Simplify vavg a bit. 2014-11-08 12:40:04 -08:00
Unknown W. Brackets 761e269e5f x86jit: Avoid some regcache pollution. 2014-11-08 12:38:08 -08:00
Unknown W. Brackets bc7497857a x86jit: Micro optimize vi2x a bit with ssse3/sse4. 
Both are small wins.
 2014-11-08 12:13:26 -08:00
Unknown W. Brackets 0e646f748a x86jit: Implement vi2x instructions. 
Also, my opcodes were wrong in the test (shifted the pair bit the wrong
way, oops.)

AFAICT, there's no reason PSRAD/etc. were not encoding REX...
 2014-11-08 12:13:26 -08:00
Unknown W. Brackets ddc90ee550 x86jit: Implement vfad and vavg. 2014-11-08 12:13:25 -08:00