Commit Graph
33 Commits
Author SHA1 Message Date
Henrik RydgårdandClaude Opus 5.5 11296d32b1 CPU: Give each MIPSState an address space for its memory accesses
Memory::AddressSpace is where a CPU's addresses point (base) and its block
shadow, with the unchecked accessors and block shadow helpers as methods. The
main CPU's is Memory::g_mainSpace, kept in step with Memory::base and
blockShadow, and MIPSState::space points at it.

The CPU cores now go through their state's space instead of the globals: the
interpreter's and IR interpreter's loads and stores (which also saves the IR
interpreter reloading the global base), the IR interpreter's block lookup,
the block table's shadow entries, and the native JITs' memory base register,
block shadow lookups and pointerified registers. Address validity and
everything outside the cores still use the globals.

No change for the main CPU; this is so another CPU (the Media Engine) can see
memory differently. Benchmarked against master (God of War: Chains of
Olympus, Tekken 6): JIT instructions retired within noise, IR interpreter
2% fewer.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-20 18:41:28 +02:00
Henrik RydgårdandClaude Opus 5.5 f99f05a40e x64 IR JIT: Cast the replacement function pointer for clang
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-20 18:08:17 +02:00
Henrik RydgårdandClaude Opus 5.5 7dd1475ed7 HLE: Pass the MIPSState to syscalls and their implementations
HLEFunc and ReplaceFunc now take the MIPSState they run on. The dispatch
paths (both interpreters and every JIT backend) pass in the state they
belong to, and CallSyscall*, hleFinishSyscall and the HLE mips call
machinery use it instead of currentMIPS.

The wrappers in FunctionWrappers.h take the function as `auto` and call it
through HLECall, which also accepts an implementation with an extra leading
MIPSState * parameter and passes the state to it. Any other signature still
fails to compile, as before. PARAM/RETURN now refer to a local `mips`.

The HLE functions (and replacement functions) that used currentMIPS now take
the state that way. Callers outside a syscall's own frame - CoreTiming
events, the adhoc matching thread, dialogs, PPGe, the debugger UIs - pass
currentMIPS or &mipsr4k explicitly. The kernel's thread internals still use
currentMIPS.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-20 15:45:14 +02:00
Henrik RydgårdandClaude Opus 5.5 5a9cbf007c CPU: Pass the MIPSState explicitly where it was already at hand
The JIT backends' calls out of generated code (the MIPS and IR interpreter
fallbacks, and the bad address report) now take the state the backend was
built for instead of reading currentMIPS. Likewise the interpreter's tick
check, the IR dispatcher's Advance, and a couple of debugger helpers.

MIPSState::InitRegisters() no longer sets currentMIPS; the boot paths set it.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
2026-10-20 09:47:48 +02:00
Henrik Rydgård 67ddf899ba Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones. 2026-08-15 19:14:13 +02:00
Henrik Rydgård 7992ff4627 Make CBreakpoints an object 2024-11-25 00:22:53 +01:00
Henrik Rydgård d3e9398cb3 Split Core_EnableStepping into Core_Break and Core_Resume 2024-11-03 17:53:42 +01:00
Henrik Rydgård 126d88ecfc Back out clearly inconsequential/useless .reserve() calls 2023-12-29 08:27:56 +01:00
Henrik Rydgård e5af1f8bd0 Merge pull request #18560 from unknownbrackets/replacement-slice
HLE: Slice the very slow memset/memcpy variants
2023-12-17 12:35:48 +01:00
Unknown W. Brackets 053831bf4d HLE: Add mechanics for sliced replacements. 2023-12-16 09:08:58 -08:00
Unknown W. Brackets 5311997753 x86jit: Correct downcount on replacement in IR. 2023-12-16 08:10:29 -08:00
Herman Semenov b871e76d05 [Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible 2023-12-15 13:59:19 +03:00
Unknown W. Brackets 9b2fa46861 IR: Add mini native jit MIPS block profiler. 2023-09-24 23:04:29 -07:00
Henrik Rydgård 06a1f0b72c Merge pull request #18226 from unknownbrackets/x86-ir-breakpoints
x86jit: Improve memory breakpoint speed
2023-09-25 00:47:22 +02:00
Unknown W. Brackets d36728e532 x86jit: Load common float vals from constants. 2023-09-24 08:01:08 -07:00
Unknown W. Brackets e433a8be4a arm64jit: Speed up memchecks, add validation. 2023-09-24 07:42:11 -07:00
Unknown W. Brackets 5929aaae85 x86jit: Speed up safe memory checks. 2023-09-24 07:06:57 -07:00
Unknown W. Brackets 017d0d4b17 x86jit: Improve memory breakpoint speed.
This helps a lot compared to before.
2023-09-24 07:06:57 -07:00
Unknown W. Brackets 06ec41d1de x86jit: Implement fcr31/break related ops. 2023-09-23 22:01:22 -07:00
Henrik Rydgård daa0586641 Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
2023-09-03 22:33:24 +02:00
Unknown W. Brackets 60bcc5b083 x86jit: Handle breakpoints.
Otherwise, we don't actually break until later, which isn't great.
Could be more optimal, "rewinding" regcache state.
2023-09-03 12:28:11 -07:00
Unknown W. Brackets 1b756ff8c1 arm64jit: Add initial base for IR jit.
This works, but very slowly at this point.
2023-09-03 12:14:28 -07:00
Henrik Rydgård ae0af175de Merge pull request #18004 from unknownbrackets/x86-jit-minor
x86jit: Small cleanup and tweaks, downcountInRegster, GetFPRLaneCount bugfix
2023-08-29 08:01:47 +02:00
Unknown W. Brackets 14d871730f x86jit: Optimize slow memory. 2023-08-28 21:16:38 -07:00
Unknown W. Brackets ee5381917a x86jit: Implement downcount in register. 2023-08-28 21:09:56 -07:00
Henrik Rydgård dddf63d057 Merge pull request #17993 from unknownbrackets/x86-jit-minor
x86jit: Replacements, expose for profiling better
2023-08-28 10:23:00 +02:00
Unknown W. Brackets 303aa0548c x86jit: Handle replacements directly. 2023-08-27 12:51:24 -07:00
Unknown W. Brackets 1b25f854a1 x86jit: Reduce code size a tiny bit. 2023-08-27 12:34:58 -07:00
Unknown W. Brackets 004c35cf76 x86jit: Implement syscalls and some system. 2023-08-25 00:01:02 -07:00
Unknown W. Brackets 931c84f835 x86jit: Implement FCmp. 2023-08-23 22:17:55 -07:00
Unknown W. Brackets 0b1953e5fd x86jit: Handle more Vec4 ops, some related. 2023-08-23 22:17:50 -07:00
Unknown W. Brackets bea74ba162 x86jit: Avoid negative offset warning. 2023-08-21 20:38:56 -07:00
Unknown W. Brackets 4e3f3860f9 x86jit: Stub out op categories to files. 2023-08-20 22:28:54 -07:00