Commit Graph
1496 Commits
Author SHA1 Message Date
Sacha 0ca7b2a794 The cvt.s.w has to be signed (as it was before). Also, implement f,sf but untested so it is left commented out. 2013-03-01 16:55:10 +10:00
Sacha 26ebdb4f11 Improve VCMP instruction with option for E.
Add comment to le JIT about how the VCMP crashes on ARM11, with commented code.
2013-03-01 15:41:45 +10:00
Sacha 6d3c89e354 Fix up VCVT function to recognise the difference in encoding for to_int and to_float. There is no 'round to zero' option for to_float. cvt.s.w and cvt.w.s should be unsigned. 2013-03-01 13:45:22 +10:00
Sacha 059abc0d69 ARMJIT: Add floor, ceil, round. Introducing a rounding mode for VCVT.
The cvt and trunc are tested heavily. Floor, ceil, round aren't tested as much as there are very few games that use it.
2013-03-01 01:10:07 +10:00
Sacha 61f5fb35bd ARMJIT: Implement cvt.w.s, cvt.s.w and trunc.w.s that are used heavily in Dragonball.
May need to keep note of FCR to get correct rounding mode? Interpreter doesn't do this either.
2013-02-28 19:46:07 +10:00
Sacha fe90d5cd06 Add VNEG and VABS implementations and use in FPU2op. 2013-02-27 23:33:59 +10:00
Henrik Rydgard 5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Henrik Rydgard 86fa4b38c3 Must restore the new scheduled event 2013-02-19 01:01:40 +01:00
Henrik Rydgard e32721c72a Merge branch 'master' into armjit-fpu
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
2013-02-19 00:50:33 +01:00
Henrik Rydgard 1aa3a657c0 Very rough and basic implementation of frameskipping. 2013-02-19 00:45:26 +01:00
Henrik Rydgard 7c91802e3c Add some infrastructure to be used for frameskipping 2013-02-19 00:45:26 +01:00
Henrik Rydgard cbb786c7f0 Restructure Windows "gameloop" to be more similar to others. 2013-02-19 00:45:25 +01:00
Henrik Rydgard f8058e4bae Disable warning for bad prefix as it floods in Wipeout Pulse. Cleanups. 2013-02-19 00:45:25 +01:00
Unknown W. Brackets 653443070d Add a few more OUT_EAT_PREFIX flags to VFPU. 2013-02-18 15:13:46 -08:00
Unknown W. Brackets d89a32e99f Mark a bunch of VFPU functions which eat prefixes. 2013-02-18 14:37:53 -08:00
Unknown W. Brackets 0e0b70bb8e vi2uc, etc. should apply the D prefix as float.
So say tests on an actual PSP.
2013-02-18 13:38:29 -08:00
Unknown W. Brackets 179fccaff7 Tests say matrices apply mask to last col (kinda.)
It seems inconsistent but probably better than before.  Also add an error.
2013-02-18 13:19:16 -08:00
Unknown W. Brackets 51d5b84108 Fix some misc HLE warnings. 2013-02-18 09:04:43 -08:00
Unknown W. Brackets 363d1dbe19 Fix some misc. warnings. 2013-02-18 08:44:59 -08:00
Unknown W. Brackets 9d490a8b50 Proper ARM buildfix. 2013-02-18 08:03:45 -08:00
Unknown W. Brackets 33c1a2b4fa ARM buildfix. 2013-02-18 01:54:25 -08:00
Unknown W. Brackets dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets afb7c0b83c Assume prefixes start default until proven wrong.
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
2013-02-18 01:14:57 -08:00
Unknown W. Brackets 0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
Unknown W. Brackets 6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
Unknown W. Brackets 8ea59990ab Make applying prefixes mostly automatic.
And implement (hopefully) D prefixes.
2013-02-18 00:11:57 -08:00
Unknown W. Brackets 18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
Unknown W. Brackets 27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
Unknown W. Brackets 08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
Unknown W. Brackets d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
Unknown W. Brackets 25c42c3532 Mark more instructions that eat prefixes. 2013-02-17 17:53:54 -08:00
Unknown W. Brackets 7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
Unknown W. Brackets f532951331 Automatically eat prefixes in x86 jit.
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
2013-02-17 17:53:53 -08:00
Unknown W. Brackets 6b223cf7d7 Add a flag for eating prefixes to the MIPS tables.
Still incomplete, just filled in ones I've tested so far.
2013-02-17 17:53:00 -08:00
Unknown W. Brackets b4fb06f51c Respect the writemask in VDot.
Although it's basically a no-op in that case...
2013-02-17 17:52:59 -08:00
Unknown W. Brackets 6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
Unknown W. Brackets be631dea64 Disasm transposed vectors properly. 2013-02-17 17:52:58 -08:00
Unknown W. Brackets 7f9516fce4 Use SSE2 in debug and x64, not just x86.
Apples to apples is nice.  More accurate floats in debug is bad.
2013-02-17 17:52:58 -08:00
Henrik Rydgård f3936e3dfa Merge pull request #727 from Xele02/qt_work
[Qt-desktop] Debug tools fix/improvements
2013-02-17 13:09:40 -08:00
Xele02 0fefca672d Add 2 step mode for display list : Go to selected line and go to next draw using selected texture 2013-02-17 21:43:44 +01:00
Xele02 6339c2fc9a Correct crash when texture too small loaded in memory tex viewer
Correct current thread PC in the list.
2013-02-17 21:43:44 +01:00
raven02 8425a123e2 Browse and Boot 2013-02-18 03:39:31 +08:00
Henrik Rydgård 04c27cbe73 Merge pull request #722 from unknownbrackets/jit-vfpu
Fix an overlap issue with vdot
2013-02-17 01:59:26 -08:00
Henrik Rydgård 7cba8378bb Merge pull request #715 from Xele02/qt_work
[Qt-desktop] Add displayList debug dialog
2013-02-17 01:58:14 -08:00
Henrik Rydgård a016272d7d Merge pull request #717 from raven02/patch-3
sceSAS style & simplification
2013-02-17 01:57:14 -08:00
Unknown W. Brackets 106cbcfc5d Fix possible overlap issue in VDot. 2013-02-16 21:26:32 -08:00
Sacha d99c9fb2ff Fix Symbian JIT + FastMem by using a mapped virtual address RChunk. 2013-02-17 15:23:56 +10:00
Unknown W. Brackets 0fdc975fde Fix wrong type in x86 jit fpu/vfpu load store. 2013-02-16 20:22:08 -08:00
Unknown W. Brackets 6eae8ed36a Disable VDot and Vec3 in x86 jit, broke things. 2013-02-16 19:57:35 -08:00
raven02 f41b3f7cf1 sceSAS style & simplification 2013-02-17 09:45:20 +08:00