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14759 Commits
Author SHA1 Message Date
Unknown W. Brackets 0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
StorMyu 43da6672bc Merge branch 'master' of https://github.com/StorMyu/ppsspp 2013-02-20 21:06:40 +01:00
StorMyu 197e5fc630 Change %i/%d to %X 
Cause it's just an easier read for every instruction to do Hexadecimal operation on Hexadecimal Immediate.
 2013-02-20 21:04:19 +01:00
Henrik Rydgard 620603c236 Fix bug in Vh2f (this instr needs more testing) 2013-02-20 00:24:21 +01:00
Henrik Rydgard 5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Henrik Rydgård d47c9fa999 Merge pull request #744 from raven02/truecolor 
Toggle 32 bit truecolor in option , default true
 2013-02-19 11:42:36 -08:00
raven02 c0dc85b99d Toggle 32 bit truecolor in option , default true 
Update Core/Config.cpp
 2013-02-20 02:10:35 +08:00
Unknown W. Brackets de7e18982c Buildfix for ARM, darn. 2013-02-19 08:01:10 -08:00
Unknown W. Brackets a0ae126a01 Exit Core_RunLoop() again in non-Windows. 2013-02-19 07:46:57 -08:00
Unknown W. Brackets 01f3c4ecde Log an error if we hit a 1x1 matrix. 2013-02-19 07:46:29 -08:00
Unknown W. Brackets 038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
Unknown W. Brackets a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
Unknown W. Brackets b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
Unknown W. Brackets a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
Unknown W. Brackets 40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
Unknown W. Brackets 2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
Unknown W. Brackets a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
Unknown W. Brackets 2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard 588bd50b4d Must restore the new scheduled event 2013-02-19 01:02:31 +01:00
Henrik Rydgard 86fa4b38c3 Must restore the new scheduled event 2013-02-19 01:01:40 +01:00
Henrik Rydgard e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
Henrik Rydgard 1aa3a657c0 Very rough and basic implementation of frameskipping. 2013-02-19 00:45:26 +01:00
Henrik Rydgard 7c91802e3c Add some infrastructure to be used for frameskipping 2013-02-19 00:45:26 +01:00
Henrik Rydgard cbb786c7f0 Restructure Windows "gameloop" to be more similar to others. 2013-02-19 00:45:25 +01:00
Henrik Rydgard f8058e4bae Disable warning for bad prefix as it floods in Wipeout Pulse. Cleanups. 2013-02-19 00:45:25 +01:00
Unknown W. Brackets 653443070d Add a few more OUT_EAT_PREFIX flags to VFPU. 2013-02-18 15:13:46 -08:00
Unknown W. Brackets d89a32e99f Mark a bunch of VFPU functions which eat prefixes. 2013-02-18 14:37:53 -08:00
Unknown W. Brackets 0e0b70bb8e vi2uc, etc. should apply the D prefix as float. 
So say tests on an actual PSP.
 2013-02-18 13:38:29 -08:00
Unknown W. Brackets 179fccaff7 Tests say matrices apply mask to last col (kinda.) 
It seems inconsistent but probably better than before.  Also add an error.
 2013-02-18 13:19:16 -08:00
Unknown W. Brackets 51d5b84108 Fix some misc HLE warnings. 2013-02-18 09:04:43 -08:00
Unknown W. Brackets 363d1dbe19 Fix some misc. warnings. 2013-02-18 08:44:59 -08:00
Unknown W. Brackets 9d490a8b50 Proper ARM buildfix. 2013-02-18 08:03:45 -08:00
Unknown W. Brackets 33c1a2b4fa ARM buildfix. 2013-02-18 01:54:25 -08:00
Unknown W. Brackets dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets 0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
Unknown W. Brackets 6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
Unknown W. Brackets 8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
Unknown W. Brackets 18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
Unknown W. Brackets 27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
Unknown W. Brackets 08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
Unknown W. Brackets d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
Unknown W. Brackets 25c42c3532 Mark more instructions that eat prefixes. 2013-02-17 17:53:54 -08:00
Unknown W. Brackets 7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
Unknown W. Brackets f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
Unknown W. Brackets 6b223cf7d7 Add a flag for eating prefixes to the MIPS tables. 
Still incomplete, just filled in ones I've tested so far.
 2013-02-17 17:53:00 -08:00
Unknown W. Brackets b4fb06f51c Respect the writemask in VDot. 
Although it's basically a no-op in that case...
 2013-02-17 17:52:59 -08:00
Unknown W. Brackets 6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
Unknown W. Brackets be631dea64 Disasm transposed vectors properly. 2013-02-17 17:52:58 -08:00
Unknown W. Brackets 7f9516fce4 Use SSE2 in debug and x64, not just x86. 
Apples to apples is nice.  More accurate floats in debug is bad.
 2013-02-17 17:52:58 -08:00