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3004 Commits
Author SHA1 Message Date
Henrik Rydgård 2891576549 Merge pull request #774 from unknownbrackets/savestates 
Wait for jit to exit the runloop in debug, quit, and savestates
 2013-02-23 14:27:05 -08:00
Henrik Rydgård 796a19dfe2 Merge pull request #772 from unknownbrackets/change-reg 
Fix change register feature
 2013-02-23 13:56:42 -08:00
Unknown W. Brackets 2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets 0c1b6fecfe Allow changing fpu/vfpu regs. 2013-02-23 12:30:18 -08:00
Unknown W. Brackets 608fb85f0d Make changing register values actually work. 2013-02-23 12:25:51 -08:00
Unknown W. Brackets 6c6bd0bd9c Correct prefix handling in vf2h/vh2f. 2013-02-23 12:16:03 -08:00
Unknown W. Brackets 42c2313893 Initial implementation of vf2h. 
Fixes Fat Princess and possibly other stuff.
 2013-02-23 12:16:03 -08:00
Unknown W. Brackets 313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
Unknown W. Brackets 08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets dede852c03 Optimize out slti in the x86 jit. 
I'm kinda surprised this actually happens...
 2013-02-21 01:25:01 -08:00
Unknown W. Brackets abde404c00 Optimize out some addu/etc. calls against imms. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets 9e479b4391 Optimize addi/addiu to just LEA when possible. 2013-02-21 01:25:00 -08:00
Unknown W. Brackets 2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
Henrik Rydgård 4511b11c5a Merge pull request #750 from unknownbrackets/jit-minor 
Some minor x86 jitting
 2013-02-20 14:02:04 -08:00
Unknown W. Brackets 958d95a029 Make bitrev use less instructions in the x86 jit. 
Much less.
 2013-02-20 13:43:17 -08:00
StorMyu 282e5be93e Update Core/MIPS/MIPSDis.cpp 2013-02-20 22:10:54 +01:00
Unknown W. Brackets 7b612cf28d Don't need this with the imm code path. 2013-02-20 12:16:57 -08:00
Unknown W. Brackets f1f48e26e4 Merge branch 'cpu-minor' into jit-minor 2013-02-20 12:10:29 -08:00
Unknown W. Brackets 2bdc9dc491 Reset llBit on thread switch. 
Never actually seen ll used, though... but this way it should
work as advertized, as long as a syscall doesn't happen in between...
 2013-02-20 12:09:13 -08:00
Unknown W. Brackets 3a365fef64 Protect against some writes to $0. 2013-02-20 12:09:12 -08:00
Unknown W. Brackets c8f85ace41 Implement bitrev in x86 jit + some imms. 2013-02-20 12:09:02 -08:00
Unknown W. Brackets c3be50acbb Implement movz/movn in the x86 jit. 2013-02-20 12:09:01 -08:00
Unknown W. Brackets 0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
StorMyu 43da6672bc Merge branch 'master' of https://github.com/StorMyu/ppsspp 2013-02-20 21:06:40 +01:00
StorMyu 197e5fc630 Change %i/%d to %X 
Cause it's just an easier read for every instruction to do Hexadecimal operation on Hexadecimal Immediate.
 2013-02-20 21:04:19 +01:00
Henrik Rydgard 620603c236 Fix bug in Vh2f (this instr needs more testing) 2013-02-20 00:24:21 +01:00
Henrik Rydgard 5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Unknown W. Brackets de7e18982c Buildfix for ARM, darn. 2013-02-19 08:01:10 -08:00
Unknown W. Brackets 01f3c4ecde Log an error if we hit a 1x1 matrix. 2013-02-19 07:46:29 -08:00
Unknown W. Brackets 038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
Unknown W. Brackets a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
Unknown W. Brackets b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
Unknown W. Brackets a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
Unknown W. Brackets 40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
Unknown W. Brackets 2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
Unknown W. Brackets a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
Unknown W. Brackets 2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
Henrik Rydgard f8058e4bae Disable warning for bad prefix as it floods in Wipeout Pulse. Cleanups. 2013-02-19 00:45:25 +01:00
Unknown W. Brackets 653443070d Add a few more OUT_EAT_PREFIX flags to VFPU. 2013-02-18 15:13:46 -08:00
Unknown W. Brackets d89a32e99f Mark a bunch of VFPU functions which eat prefixes. 2013-02-18 14:37:53 -08:00
Unknown W. Brackets 0e0b70bb8e vi2uc, etc. should apply the D prefix as float. 
So say tests on an actual PSP.
 2013-02-18 13:38:29 -08:00
Unknown W. Brackets 179fccaff7 Tests say matrices apply mask to last col (kinda.) 
It seems inconsistent but probably better than before.  Also add an error.
 2013-02-18 13:19:16 -08:00
Unknown W. Brackets 51d5b84108 Fix some misc HLE warnings. 2013-02-18 09:04:43 -08:00
Unknown W. Brackets 9d490a8b50 Proper ARM buildfix. 2013-02-18 08:03:45 -08:00
Unknown W. Brackets 33c1a2b4fa ARM buildfix. 2013-02-18 01:54:25 -08:00
Unknown W. Brackets dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets 0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
Unknown W. Brackets 6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00