Commit Graph

94 Commits

Author SHA1 Message Date
Henrik Rydgård 2797cfca56 Remove more vestiges of old experiments 2026-02-12 01:23:48 +01:00
Henrik Rydgård d5bfc1b5eb Finish up this cleanup (move _M_SSE compat define out of Common.h) 2024-12-19 16:23:20 +01:00
Unknown W. Brackets 4178f09e57 Build: More consistently avoid _M_ defines.
We use PPSSPP_ARCH in several places already, this makes it more complete.
2021-03-02 21:49:21 -08:00
Unknown W. Brackets cae0815095 jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
2021-02-26 07:24:58 -08:00
Henrik Rydgård 608d082e49 FPURegCache: The invariant checking is very slow in debug mode. Let's only turn it on when we need it. 2020-09-17 20:52:32 +02:00
Henrik Rydgård 0829543987 Third part of getting rid of PanicAlert 2020-07-19 20:34:02 +02:00
Henrik Rydgård c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgård 8d86463b1a More RIP fixes 2017-07-07 15:46:14 +02:00
Henrik Rydgård 837118d230 More RIP elimination 2017-07-07 15:07:56 +02:00
Henrik Rydgård e5a7d0df95 Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k 2017-07-07 12:59:23 +02:00
Henrik Rydgård ecbeee5225 RegCacheFPU 2017-07-07 11:33:07 +02:00
Henrik Rydgård 567937fa4d x64: Enable non-RIP addressing for FPU registers 2017-07-07 11:33:07 +02:00
Henrik Rydgård 0645677fea Access FPU temps through CTXREG 2017-07-07 11:33:06 +02:00
Henrik Rydgård 7c1ae5b3e6 Move tempValues into MIPSState 2017-07-07 11:33:05 +02:00
Henrik Rydgård 78538ff61e Some code cleanup. More work towards removing RIP addressing 2017-07-07 11:33:04 +02:00
Henrik Rydgard b0bd7e3c6f Minor changes for compatibility with VS2017 2017-03-12 17:33:00 +01:00
Florent Castelli 8c3552de74 cmake: Detect features at compile time
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
2016-10-19 12:31:19 +02:00
Unknown W. Brackets f4a06cd79a Remove an impossible assert condition. 2016-05-31 11:56:23 -07:00
Henrik Rydgård c1b91ff5c1 x86: Add a way to eliminate some mov instructions.
Not currently used yet.
2015-04-12 13:50:23 -07:00
Chin 37f50a3792 Change to pass some arguments by reference 2015-03-01 16:49:00 +01:00
Unknown W. Brackets 0dc3e4e2db x86jit: Handle unable to spill better.
Might as well check the result to be safe.
2015-01-17 18:42:58 -08:00
Henrik Rydgård bb1d571493 Merge pull request #7261 from hilesaz/master
Fix simd vmmul transpose optimizations.
2015-01-06 11:59:14 +01:00
Henrik Rydgard 90376267b1 More reg number asserts 2015-01-04 23:15:33 +01:00
Henrik Rydgard fe63a15e22 x86jit fpu regcache: Add extra invariant check for too-large mips register numbers 2015-01-04 22:54:01 +01:00
Bovine 0fdebdc1ca Fix discardVS.
It's not valid for non-away values to have a lane.
2015-01-03 16:54:31 -07:00
Henrik Rydgard 3cc633f091 x86jit: Minor logging improvements in FPU recache 2015-01-03 22:55:39 +01:00
Unknown W. Brackets 5f6f8ac0a2 x86jit: Fix another sequential detect problem.
Arg.  Maybe should use voffset after all, but it won't fit in a u8
anyway...
2014-12-31 22:43:31 -08:00
Bovine a9b7656f93 Fix to VFPU register allocation. Fixes #7174
GetFreeXRegs(_,_,true) invalidates registers it can see on spill,
but it can't see all the registers in the array due to how we call it
so we have to invalidate the rest ourselves.  Not doing so can get it
to use the same register twice.
2014-12-23 03:39:50 -07:00
Henrik Rydgard 05a8e2e35d Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Unknown W. Brackets 9dd6bb56bb jit: Make available js_ and jo_ in regcaches. 2014-12-07 21:07:23 -08:00
Henrik Rydgard 51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard e3a81f4346 x86 Jit: Basic implementation of vbfy1/2 (mostly to just cross another one off the list..) 2014-12-04 00:18:58 +01:00
Unknown W. Brackets 48b3a292d7 x86jit: Add more sanity checks. 2014-11-30 17:43:07 -08:00
Unknown W. Brackets 9cfe801075 x86jit: Ensure we don't sequence temps+regs. 2014-11-30 17:42:43 -08:00
Unknown W. Brackets 23e3916a77 x86jit: Fix a stupid typo. 2014-11-30 17:42:02 -08:00
Unknown W. Brackets c6b090d82e x86jit: When storing, verify alignment. 2014-11-30 13:06:16 -08:00
Unknown W. Brackets fbc453b083 x86jit: Oops, here also.
Maybe I should kill these early returns after all..
2014-11-30 12:39:30 -08:00
Unknown W. Brackets 5758102be6 x86jit: Correct handling of temp vregs in VS. 2014-11-30 12:33:06 -08:00
Unknown W. Brackets 750f40e260 x86jit: Oops, forgot to add this back.
MapRegV() will be too dangerous if it locks so do it here.
2014-11-30 11:02:55 -08:00
Unknown W. Brackets 0000be1bb2 x86jit: Add a MAP_NOLOCK flag to not lock.
Only for MapRegs*.  And then lock all by default, including
TryMapRegsVS().
2014-11-30 10:36:44 -08:00
Unknown W. Brackets 52cfe4a8a3 x86jit: Avoid MOVSS into self. 2014-11-30 10:35:26 -08:00
Henrik Rydgard ac772f25ff x86 JIT: Join adjacent vrot calls together to avoid redundant sin/cos calls. Add a prototype, fix minor issues. 2014-11-30 11:04:13 +01:00
Henrik Rydgård 7deb8055ee Merge pull request #7117 from unknownbrackets/jit-simd
x86jit: Implement vmmov using SIMD
2014-11-30 09:24:22 +01:00
Unknown W. Brackets 679a824487 x86jit: when reusing a reg, don't zap slot.
If we returned the same reg it was in before, don't zap the slots because
slot #1 may be valid.
2014-11-29 23:11:50 -08:00
Unknown W. Brackets c3578bd8eb x86jit: Find the correct available regs.
If there aren't n available regs, they may not of course be in slots 0 and
1.  Have to go and find them.
2014-11-29 22:12:40 -08:00
Unknown W. Brackets df6a07f24e x86jit: Allow only one reg for sequential load. 2014-11-29 22:11:52 -08:00
Unknown W. Brackets bb26e4f7d0 x86jit: Implement vmmov using SIMD.
4x -> 87x in microbenchmarking.
2014-11-29 18:46:38 -08:00
Unknown W. Brackets 67608639c5 x86jit: Oops, can't have loaded regs here yet. 2014-11-29 09:07:25 -08:00
Unknown W. Brackets f6f943de63 jit: MAP_NOINIT should always mean MAP_DIRTY. 2014-11-29 00:14:08 -08:00
Unknown W. Brackets 0839ce59e1 x86jit: Apply dirty when reusing 1-reg VS. 2014-11-27 01:05:11 -08:00